Commit 923406e7 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amd/pm: Reset SMU v13.0.x custom settings 



On SMU v13.0.2 and SMU v13.0.6 variants user may choose custom min/max
clocks in manual perf mode. Those custom min/max values need to be
reset once user switches to auto or restores default settings.
Otherwise, they may get used inadvertently during the next operation.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9d40b05d

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

+1 −0
Original line number Diff line number Diff line
@@ -310,6 +310,7 @@ int smu_v13_0_get_boot_freq_by_index(struct smu_context *smu, 
				     uint32_t *value);



void smu_v13_0_interrupt_work(struct smu_context *smu);

void smu_v13_0_reset_custom_level(struct smu_context *smu);

bool smu_v13_0_12_is_dpm_running(struct smu_context *smu);

int smu_v13_0_12_get_max_metrics_size(void);

int smu_v13_0_12_setup_driver_pptable(struct smu_context *smu);

drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

+11 −2
Original line number Diff line number Diff line
@@ -1270,6 +1270,7 @@ static int aldebaran_set_performance_level(struct smu_context *smu, 
	struct smu_13_0_dpm_table *gfx_table =

		&dpm_context->dpm_tables.gfx_table;

	struct smu_umd_pstate_table *pstate_table = &smu->pstate_table;

	int r;



	/* Disable determinism if switching to another mode */

	if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) &&
@@ -1282,7 +1283,11 @@ static int aldebaran_set_performance_level(struct smu_context *smu, 


	case AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM:

		return 0;



	case AMD_DPM_FORCED_LEVEL_AUTO:

		r = smu_v13_0_set_performance_level(smu, level);

		if (!r)

			smu_v13_0_reset_custom_level(smu);

		return r;

	case AMD_DPM_FORCED_LEVEL_HIGH:

	case AMD_DPM_FORCED_LEVEL_LOW:

	case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
@@ -1423,7 +1428,11 @@ static int aldebaran_usr_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_ 
			min_clk = dpm_context->dpm_tables.gfx_table.min;

			max_clk = dpm_context->dpm_tables.gfx_table.max;



			return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk, false);

			ret = aldebaran_set_soft_freq_limited_range(

				smu, SMU_GFXCLK, min_clk, max_clk, false);

			if (ret)

				return ret;

			smu_v13_0_reset_custom_level(smu);

		}

		break;

	case PP_OD_COMMIT_DPM_TABLE:

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

+10 −0
Original line number Diff line number Diff line
@@ -2595,3 +2595,13 @@ int smu_v13_0_set_wbrf_exclusion_ranges(struct smu_context *smu, 


	return ret;

}



void smu_v13_0_reset_custom_level(struct smu_context *smu)

{

	struct smu_umd_pstate_table *pstate_table = &smu->pstate_table;



	pstate_table->uclk_pstate.custom.min = 0;

	pstate_table->uclk_pstate.custom.max = 0;

	pstate_table->gfxclk_pstate.custom.min = 0;

	pstate_table->gfxclk_pstate.custom.max = 0;

}

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -1916,7 +1916,7 @@ static int smu_v13_0_6_set_performance_level(struct smu_context *smu, 
				return ret;

			pstate_table->uclk_pstate.curr.max = uclk_table->max;

		}

		pstate_table->uclk_pstate.custom.max = 0;

		smu_v13_0_reset_custom_level(smu);



		return 0;

	case AMD_DPM_FORCED_LEVEL_MANUAL:
@@ -2129,7 +2129,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu, 
				smu, SMU_UCLK, min_clk, max_clk, false);

			if (ret)

				return ret;

			pstate_table->uclk_pstate.custom.max = 0;

			smu_v13_0_reset_custom_level(smu);

		}

		break;

	case PP_OD_COMMIT_DPM_TABLE: