Commit 92710524 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam
Browse files

bus: mhi: ep: Rename read_from_host() and write_to_host() APIs



In the preparation for adding async API support, let's rename the existing
APIs to read_sync() and write_sync() to make it explicit that these APIs
are used for synchronous read/write.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent b08ded2e
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+2 −2
Original line number Diff line number Diff line
@@ -377,7 +377,7 @@ static int mhi_ep_read_channel(struct mhi_ep_cntrl *mhi_cntrl,
		buf_info.size = tr_len;

		dev_dbg(dev, "Reading %zd bytes from channel (%u)\n", tr_len, ring->ch_id);
		ret = mhi_cntrl->read_from_host(mhi_cntrl, &buf_info);
		ret = mhi_cntrl->read_sync(mhi_cntrl, &buf_info);
		if (ret < 0) {
			dev_err(&mhi_chan->mhi_dev->dev, "Error reading from channel\n");
			return ret;
@@ -539,7 +539,7 @@ int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb)
		buf_info.size = tr_len;

		dev_dbg(dev, "Writing %zd bytes to channel (%u)\n", tr_len, ring->ch_id);
		ret = mhi_cntrl->write_to_host(mhi_cntrl, &buf_info);
		ret = mhi_cntrl->write_sync(mhi_cntrl, &buf_info);
		if (ret < 0) {
			dev_err(dev, "Error writing to the channel\n");
			goto err_exit;
+4 −4
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ static int __mhi_ep_cache_ring(struct mhi_ep_ring *ring, size_t end)
		buf_info.host_addr = ring->rbase + (start * sizeof(struct mhi_ring_element));
		buf_info.dev_addr = &ring->ring_cache[start];

		ret = mhi_cntrl->read_from_host(mhi_cntrl, &buf_info);
		ret = mhi_cntrl->read_sync(mhi_cntrl, &buf_info);
		if (ret < 0)
			return ret;
	} else {
@@ -56,7 +56,7 @@ static int __mhi_ep_cache_ring(struct mhi_ep_ring *ring, size_t end)
		buf_info.host_addr = ring->rbase + (start * sizeof(struct mhi_ring_element));
		buf_info.dev_addr = &ring->ring_cache[start];

		ret = mhi_cntrl->read_from_host(mhi_cntrl, &buf_info);
		ret = mhi_cntrl->read_sync(mhi_cntrl, &buf_info);
		if (ret < 0)
			return ret;

@@ -65,7 +65,7 @@ static int __mhi_ep_cache_ring(struct mhi_ep_ring *ring, size_t end)
			buf_info.dev_addr = &ring->ring_cache[0];
			buf_info.size = end * sizeof(struct mhi_ring_element);

			ret = mhi_cntrl->read_from_host(mhi_cntrl, &buf_info);
			ret = mhi_cntrl->read_sync(mhi_cntrl, &buf_info);
			if (ret < 0)
				return ret;
		}
@@ -143,7 +143,7 @@ int mhi_ep_ring_add_element(struct mhi_ep_ring *ring, struct mhi_ring_element *e
	buf_info.dev_addr = el;
	buf_info.size = sizeof(*el);

	return mhi_cntrl->write_to_host(mhi_cntrl, &buf_info);
	return mhi_cntrl->write_sync(mhi_cntrl, &buf_info);
}

void mhi_ep_ring_init(struct mhi_ep_ring *ring, enum mhi_ep_ring_type type, u32 id)
+4 −4
Original line number Diff line number Diff line
@@ -536,11 +536,11 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf)
	mhi_cntrl->alloc_map = pci_epf_mhi_alloc_map;
	mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free;
	if (info->flags & MHI_EPF_USE_DMA) {
		mhi_cntrl->read_from_host = pci_epf_mhi_edma_read;
		mhi_cntrl->write_to_host = pci_epf_mhi_edma_write;
		mhi_cntrl->read_sync = pci_epf_mhi_edma_read;
		mhi_cntrl->write_sync = pci_epf_mhi_edma_write;
	} else {
		mhi_cntrl->read_from_host = pci_epf_mhi_iatu_read;
		mhi_cntrl->write_to_host = pci_epf_mhi_iatu_write;
		mhi_cntrl->read_sync = pci_epf_mhi_iatu_read;
		mhi_cntrl->write_sync = pci_epf_mhi_iatu_write;
	}

	/* Register the MHI EP controller */
+4 −4
Original line number Diff line number Diff line
@@ -94,8 +94,8 @@ struct mhi_ep_buf_info {
 * @raise_irq: CB function for raising IRQ to the host
 * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
 * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
 * @read_from_host: CB function for reading from host memory from endpoint
 * @write_to_host: CB function for writing to host memory from endpoint
 * @read_sync: CB function for reading from host memory synchronously
 * @write_sync: CB function for writing to host memory synchronously
 * @mhi_state: MHI Endpoint state
 * @max_chan: Maximum channels supported by the endpoint controller
 * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
@@ -149,8 +149,8 @@ struct mhi_ep_cntrl {
			 void __iomem **virt, size_t size);
	void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
			   void __iomem *virt, size_t size);
	int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
	int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
	int (*read_sync)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
	int (*write_sync)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);

	enum mhi_state mhi_state;