Commit 93160b2d authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to CURCNTR 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURCNTR register macro.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/06bc681558c86f351ae596e9600133bb10ae4bdd.1715774156.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent d2c4b1db

drivers/gpu/drm/i915/display/intel_cursor.c

+5 −5
Original line number Diff line number Diff line
@@ -295,11 +295,11 @@ static void i845_cursor_update_arm(struct intel_plane *plane, 
	if (plane->cursor.base != base ||

	    plane->cursor.size != size ||

	    plane->cursor.cntl != cntl) {

		intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), 0);

		intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);

		intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base);

		intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);

		intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);

		intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), cntl);

		intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);



		plane->cursor.base = base;

		plane->cursor.size = size;
@@ -328,7 +328,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane, 
	if (!wakeref)

		return false;



	ret = intel_de_read(dev_priv, CURCNTR(PIPE_A)) & CURSOR_ENABLE;

	ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & CURSOR_ENABLE;



	*pipe = PIPE_A;
@@ -646,7 +646,7 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane, 
		if (HAS_CUR_FBC(dev_priv))

			intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),

					  fbc_ctl);

		intel_de_write_fw(dev_priv, CURCNTR(pipe), cntl);

		intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);

		intel_de_write_fw(dev_priv, CURPOS(pipe), pos);

		intel_de_write_fw(dev_priv, CURBASE(pipe), base);
@@ -684,7 +684,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane, 
	if (!wakeref)

		return false;



	val = intel_de_read(dev_priv, CURCNTR(plane->pipe));

	val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));



	ret = val & MCURSOR_MODE_MASK;

drivers/gpu/drm/i915/display/intel_cursor_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ 
#define _CURBBASE_IVB		0x71084

#define _CURBPOS_IVB		0x71088



#define CURCNTR(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)

#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)

#define CURBASE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)

#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)

#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)

drivers/gpu/drm/i915/display/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -8238,9 +8238,9 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) 
	drm_WARN_ON(&dev_priv->drm,

		    intel_de_read(dev_priv, DSPCNTR(PLANE_C)) & DISP_ENABLE);

	drm_WARN_ON(&dev_priv->drm,

		    intel_de_read(dev_priv, CURCNTR(PIPE_A)) & MCURSOR_MODE_MASK);

		    intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & MCURSOR_MODE_MASK);

	drm_WARN_ON(&dev_priv->drm,

		    intel_de_read(dev_priv, CURCNTR(PIPE_B)) & MCURSOR_MODE_MASK);

		    intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_B)) & MCURSOR_MODE_MASK);



	intel_de_write(dev_priv, TRANSCONF(pipe), 0);

	intel_de_posting_read(dev_priv, TRANSCONF(pipe));

drivers/gpu/drm/i915/gvt/display.c

+4 −4
Original line number Diff line number Diff line
@@ -194,8 +194,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) 
				~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);

			vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE;

			vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;

			vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK;

			vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;

			vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) &= ~MCURSOR_MODE_MASK;

			vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) |= MCURSOR_MODE_DISABLE;

		}



		for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {
@@ -505,8 +505,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) 
	for_each_pipe(dev_priv, pipe) {

		vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE;

		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;

		vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) &= ~MCURSOR_MODE_MASK;

		vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) |= MCURSOR_MODE_DISABLE;

	}



	vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_A)) |= TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/fb_decoder.c

+1 −1
Original line number Diff line number Diff line
@@ -347,7 +347,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, 
	if (pipe >= I915_MAX_PIPES)

		return -ENODEV;



	val = vgpu_vreg_t(vgpu, CURCNTR(pipe));

	val = vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe));

	mode = val & MCURSOR_MODE_MASK;

	plane->enabled = (mode != MCURSOR_MODE_DISABLE);

	if (!plane->enabled)