Unverified Commit 936abb09 authored by Shuming Fan's avatar Shuming Fan Committed by Mark Brown
Browse files

ASoC: rt712-sdca: add the function for version B



The version B will support the multi-lane function and integrate the DMIC function
in one SoundWire interface.
Due to some registers having different default values between version A and B,
this patch also removes the redundant default registers to avoid confusion.

Signed-off-by: default avatarShuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20240620103237.2124196-1-shumingf@realtek.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent f2177731
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+22 −2
Original line number Diff line number Diff line
@@ -34,6 +34,10 @@ static bool rt712_sdca_readable_register(struct device *dev, unsigned int reg)
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
		SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
		return true;
	default:
@@ -56,6 +60,10 @@ static bool rt712_sdca_volatile_register(struct device *dev, unsigned int reg)
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
		SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
	case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
		return true;
	default:
@@ -78,13 +86,21 @@ static bool rt712_sdca_mbq_readable_register(struct device *dev, unsigned int re
	case 0x5c00000 ... 0x5c0009a:
	case 0x5d00000 ... 0x5d00009:
	case 0x5f00000 ... 0x5f00030:
	case 0x6100000 ... 0x6100068:
	case 0x6100000 ... 0x61000f1:
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_01):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_02):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_01):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_02):
	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_01):
	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_02):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
		return true;
	default:
		return false;
@@ -96,7 +112,9 @@ static bool rt712_sdca_mbq_volatile_register(struct device *dev, unsigned int re
	switch (reg) {
	case 0x2000000:
	case 0x200001a:
	case 0x2000020:
	case 0x2000024:
	case 0x2000030:
	case 0x2000046:
	case 0x200008a:
	case 0x5800000:
@@ -178,13 +196,15 @@ static int rt712_sdca_read_prop(struct sdw_slave *slave)
	unsigned long addr;
	struct sdw_dpn_prop *dpn;

	sdw_slave_read_prop(slave);

	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;

	prop->paging_support = true;

	/* first we need to allocate memory for set bits in port lists */
	prop->source_ports = BIT(4); /* BITMAP: 00010000 */
	prop->source_ports = BIT(8) | BIT(4); /* BITMAP: 100010000 */
	prop->sink_ports = BIT(3) | BIT(1); /* BITMAP:  00001010 */

	nval = hweight32(prop->source_ports);
+18 −51
Original line number Diff line number Diff line
@@ -12,49 +12,7 @@
#include <linux/soundwire/sdw_registers.h>

static const struct reg_default rt712_sdca_reg_defaults[] = {
	{ 0x201a, 0x00 },
	{ 0x201b, 0x00 },
	{ 0x201c, 0x00 },
	{ 0x201d, 0x00 },
	{ 0x201e, 0x00 },
	{ 0x201f, 0x00 },
	{ 0x2029, 0x00 },
	{ 0x202a, 0x00 },
	{ 0x202d, 0x00 },
	{ 0x202e, 0x00 },
	{ 0x202f, 0x00 },
	{ 0x2030, 0x00 },
	{ 0x2031, 0x00 },
	{ 0x2032, 0x00 },
	{ 0x2033, 0x00 },
	{ 0x2034, 0x00 },
	{ 0x2230, 0x00 },
	{ 0x2231, 0x2f },
	{ 0x2232, 0x80 },
	{ 0x2f01, 0x00 },
	{ 0x2f02, 0x09 },
	{ 0x2f03, 0x00 },
	{ 0x2f04, 0x00 },
	{ 0x2f05, 0x0b },
	{ 0x2f06, 0x01 },
	{ 0x2f08, 0x00 },
	{ 0x2f09, 0x00 },
	{ 0x2f0a, 0x01 },
	{ 0x2f35, 0x01 },
	{ 0x2f36, 0xcf },
	{ 0x2f50, 0x0f },
	{ 0x2f54, 0x01 },
	{ 0x2f58, 0x07 },
	{ 0x2f59, 0x09 },
	{ 0x2f5a, 0x01 },
	{ 0x2f5b, 0x07 },
	{ 0x2f5c, 0x05 },
	{ 0x2f5d, 0x05 },
	{ 0x3201, 0x01 },
	{ 0x320c, 0x00 },
	{ 0x3301, 0x01 },
	{ 0x3302, 0x00 },
	{ 0x3303, 0x1f },

	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS01, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS11, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
@@ -63,17 +21,22 @@ static const struct reg_default rt712_sdca_reg_defaults[] = {
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE40, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE12, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_CS31, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_PDE23, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_PDE23, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_CS31, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_OT23, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
};

static const struct reg_default rt712_sdca_mbq_defaults[] = {
	{ 0x2000004, 0xaa01 },
	{ 0x200000e, 0x21e0 },
	{ 0x2000024, 0x01ba },
	{ 0x200004a, 0x8830 },
	{ 0x2000067, 0xf100 },
	{ 0x5800000, 0x1893 },
@@ -81,12 +44,8 @@ static const struct reg_default rt712_sdca_mbq_defaults[] = {
	{ 0x5b00005, 0x0000 },
	{ 0x5b00029, 0x3fff },
	{ 0x5b0002a, 0xf000 },
	{ 0x5f00008, 0x7000 },
	{ 0x6100000, 0x04e4 },
	{ 0x610000e, 0x0007 },
	{ 0x6100022, 0x2828 },
	{ 0x6100023, 0x2929 },
	{ 0x6100026, 0x2c29 },
	{ 0x610002c, 0x4150 },
	{ 0x6100045, 0x0860 },
	{ 0x6100046, 0x0029 },
	{ 0x6100053, 0x3fff },
@@ -101,6 +60,14 @@ static const struct reg_default rt712_sdca_mbq_defaults[] = {
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PLATFORM_FU44, RT712_SDCA_CTL_FU_CH_GAIN, CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PLATFORM_FU44, RT712_SDCA_CTL_FU_CH_GAIN, CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
};
+580 −47

File changed.

Preview size limit exceeded, changes collapsed.

+40 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ struct rt712_sdca_priv {
	struct regmap *regmap;
	struct regmap *mbq_regmap;
	struct snd_soc_component *component;
	struct snd_soc_component *dmic_component;
	struct sdw_slave *slave;
	struct sdw_bus_params params;
	bool hw_init;
@@ -34,9 +35,19 @@ struct rt712_sdca_priv {
	unsigned int scp_sdca_stat1;
	unsigned int scp_sdca_stat2;
	unsigned int hw_id;
	unsigned int version_id;
	bool fu0f_dapm_mute;
	bool fu0f_mixer_l_mute;
	bool fu0f_mixer_r_mute;
	bool fu1e_dapm_mute;
	bool fu1e_mixer_mute[4];
};

struct rt712_dmic_kctrl_priv {
	unsigned int reg_base;
	unsigned int count;
	unsigned int max;
	unsigned int invert;
};

/* SDCA (Channel) */
@@ -47,6 +58,8 @@ struct rt712_sdca_priv {

/* NID */
#define RT712_VENDOR_REG			0x20
#define RT712_EQ_CTRL				0x53
#define RT712_CHARGE_PUMP			0x57
#define RT712_VENDOR_CALI			0x58
#define RT712_ULTRA_SOUND_DET			0x59
#define RT712_VENDOR_IMS_DRE			0x5b
@@ -56,9 +69,13 @@ struct rt712_sdca_priv {
/* Index (NID:20h) */
#define RT712_JD_PRODUCT_NUM			0x00
#define RT712_ANALOG_BIAS_CTL3			0x04
#define RT712_JD_CTL1				0x09
#define RT712_IO_CTL				0x0c
#define RT712_LDO2_3_CTL1			0x0e
#define RT712_PARA_VERB_CTL			0x1a
#define RT712_CC_DET1				0x24
#define RT712_CLASSD_AMP_CTL1			0x37
#define RT712_CLASSD_AMP_CTL6			0x3c
#define RT712_COMBO_JACK_AUTO_CTL1		0x45
#define RT712_COMBO_JACK_AUTO_CTL2		0x46
#define RT712_COMBO_JACK_AUTO_CTL3		0x47
@@ -67,6 +84,9 @@ struct rt712_sdca_priv {
#define RT712_SW_CONFIG1			0x8a
#define RT712_SW_CONFIG2			0x8b

/* Index (NID:57h) */
#define RT712_HP_DET_CTL3			0x0c

/* Index (NID:58h) */
#define RT712_DAC_DC_CALI_CTL1			0x00
#define RT712_DAC_DC_CALI_CTL2			0x01
@@ -77,6 +97,7 @@ struct rt712_sdca_priv {
/* Index (NID:5bh) */
#define RT712_IMS_DIGITAL_CTL1			0x00
#define RT712_IMS_DIGITAL_CTL5			0x05
#define RT712_SEL_VEE2_HP_CTL1			0x23
#define RT712_HP_DETECT_RLDET_CTL1		0x29
#define RT712_HP_DETECT_RLDET_CTL2		0x2a

@@ -115,6 +136,11 @@ struct rt712_sdca_priv {
#define RT712_UMP_HID_CTL6				0x66
#define RT712_UMP_HID_CTL7				0x67
#define RT712_UMP_HID_CTL8				0x68
#define RT712_MISC_CTL_FOR_UAJ				0x72
#define RT712_ADC0A_CS_ADC0B_FU_FLOAT_CTL		0xa2
#define RT712_DMIC2_FU_IT_FLOAT_CTL			0xa6
#define RT712_ADC0B_FU_CH12_FLOAT_CTL			0xb0
#define RT712_DMIC2_FU_CH12_FLOAT_CTL			0xb1

/* Parameter & Verb control 01 (0x1a)(NID:20h) */
#define RT712_HIDDEN_REG_SW_RESET (0x1 << 14)
@@ -145,6 +171,7 @@ struct rt712_sdca_priv {
#define FUNC_NUM_AMP 0x04

/* RT712 SDCA entity */
#define RT712_SDCA_ENT0 0x00
#define RT712_SDCA_ENT_HID01 0x01
#define RT712_SDCA_ENT_GE49 0x49
#define RT712_SDCA_ENT_USER_FU05 0x05
@@ -163,6 +190,7 @@ struct rt712_sdca_priv {
#define RT712_SDCA_ENT_CS1C 0x1c
#define RT712_SDCA_ENT_CS31 0x31
#define RT712_SDCA_ENT_OT23 0x42
#define RT712_SDCA_ENT_IT11 0x26
#define RT712_SDCA_ENT_IT26 0x26
#define RT712_SDCA_ENT_IT09 0x09
#define RT712_SDCA_ENT_PLATFORM_FU15 0x15
@@ -181,6 +209,12 @@ struct rt712_sdca_priv {
#define RT712_SDCA_CTL_REQ_POWER_STATE 0x01
#define RT712_SDCA_CTL_VENDOR_DEF 0x30
#define RT712_SDCA_CTL_FU_CH_GAIN 0x0b
#define RT712_SDCA_CTL_FUNC_STATUS 0x10

/* Function_Status */
#define FUNCTION_NEEDS_INITIALIZATION		BIT(5)
#define FUNCTION_HAS_BEEN_RESET			BIT(6)
#define FUNCTION_BUSY				BIT(7)

/* sample frequency index */
#define RT712_SDCA_RATE_16000HZ		0x04
@@ -193,6 +227,7 @@ struct rt712_sdca_priv {
enum {
	RT712_AIF1,
	RT712_AIF2,
	RT712_AIF3,
};

enum rt712_sdca_jd_src {
@@ -209,6 +244,11 @@ enum rt712_sdca_hw_id {

#define RT712_PART_ID_713 0x713

enum rt712_sdca_version {
	RT712_VA,
	RT712_VB,
};

int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave);
int rt712_sdca_init(struct device *dev, struct regmap *regmap,
			struct regmap *mbq_regmap, struct sdw_slave *slave);