Commit 93745285 authored by Biju Das's avatar Biju Das Committed by Ulf Hansson
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dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support



The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that
of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must
use SD_STATUS register to control voltage and power enable (internal
regulator), for non-fixed voltage (SD) MMC interface. However, it is
optional for fixed voltage MMC interface (eMMC).

For SD1 and SD2 channels, we can either use gpio regulator or internal
regulator (using SD_STATUS register) for voltage switching.

Document RZ/G3E SDHI IP support with optional internal regulator for
both RZ/G3E and RZ/V2H SoC.

Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250305092958.21865-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ab5d7073
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Original line number Diff line number Diff line
@@ -68,6 +68,9 @@ properties:
              - renesas,sdhi-r9a08g045 # RZ/G3S
              - renesas,sdhi-r9a09g011 # RZ/V2M
          - const: renesas,rzg2l-sdhi
      - items:
          - const: renesas,sdhi-r9a09g047 # RZ/G3E
          - const: renesas,sdhi-r9a09g057 # RZ/V2H(P)

  reg:
    maxItems: 1
@@ -211,6 +214,19 @@ allOf:
        sectioned off to be run by a separate second clock source to allow
        the main core clock to be turned off to save power.

  - if:
      properties:
        compatible:
          contains:
            const: renesas,sdhi-r9a09g057
    then:
      properties:
        vqmmc-regulator:
          type: object
          description: VQMMC SD regulator
          $ref: /schemas/regulator/regulator.yaml#
          unevaluatedProperties: false

required:
  - compatible
  - reg