Commit 93bafa32 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: skip to program GFXDEC registers for suspend abort



In the suspend abort cases, the gfx power rail doesn't turn off so
some GFXDEC registers/CSB can't reset to default value and at this
moment reinitialize GFXDEC/CSB will result in an unexpected error.
So let skip those program sequence for the suspend abort case.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2103370a
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+2 −0
Original line number Diff line number Diff line
@@ -1078,6 +1078,8 @@ struct amdgpu_device {
	bool				in_s3;
	bool				in_s4;
	bool				in_s0ix;
	/* indicate amdgpu suspension status */
	bool				suspend_complete;

	enum pp_mp1_state               mp1_state;
	struct amdgpu_doorbell_index doorbell_index;
+2 −0
Original line number Diff line number Diff line
@@ -2476,6 +2476,7 @@ static int amdgpu_pmops_suspend(struct device *dev)
	struct drm_device *drm_dev = dev_get_drvdata(dev);
	struct amdgpu_device *adev = drm_to_adev(drm_dev);

	adev->suspend_complete = false;
	if (amdgpu_acpi_is_s0ix_active(adev))
		adev->in_s0ix = true;
	else if (amdgpu_acpi_is_s3_active(adev))
@@ -2490,6 +2491,7 @@ static int amdgpu_pmops_suspend_noirq(struct device *dev)
	struct drm_device *drm_dev = dev_get_drvdata(dev);
	struct amdgpu_device *adev = drm_to_adev(drm_dev);

	adev->suspend_complete = true;
	if (amdgpu_acpi_should_gpu_reset(adev))
		return amdgpu_asic_reset(adev);

+8 −0
Original line number Diff line number Diff line
@@ -3034,6 +3034,14 @@ static int gfx_v9_0_cp_gfx_start(struct amdgpu_device *adev)

	gfx_v9_0_cp_gfx_enable(adev, true);

	/* Now only limit the quirk on the APU gfx9 series and already
	 * confirmed that the APU gfx10/gfx11 needn't such update.
	 */
	if (adev->flags & AMD_IS_APU &&
			adev->in_s3 && !adev->suspend_complete) {
		DRM_INFO(" Will skip the CSB packet resubmit\n");
		return 0;
	}
	r = amdgpu_ring_alloc(ring, gfx_v9_0_get_csb_size(adev) + 4 + 3);
	if (r) {
		DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);