Commit 93d46ea3 authored by Rohan G Thomas's avatar Rohan G Thomas Committed by Jakub Kicinski
Browse files

net: stmmac: socfpga: Agilex5 EMAC platform configuration 



Agilex5 HPS EMAC uses the dwxgmac-3.10a IP, unlike previous socfpga
platforms which use dwmac1000 IP. Due to differences in platform
configuration, Agilex5 requires a distinct setup.

Introduce a setup_plat_dat() callback in socfpga_dwmac_ops to handle
platform-specific setup. This callback is invoked before
stmmac_dvr_probe() to ensure the platform data is correctly
configured. Also, implemented separate setup_plat_dat() callback for
current socfpga platforms and Agilex5.

Signed-off-by: default avatarRohan G Thomas <rohan.g.thomas@altera.com>
Reviewed-by: default avatarMaxime Chevallier <maxime.chevallier@bootlin.com>
Tested-by: default avatarMaxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/20251101-agilex5_ext-v2-1-a6b51b4dca4d@altera.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9b73cdad

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c

+27 −3
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 
struct socfpga_dwmac;

struct socfpga_dwmac_ops {

	int (*set_phy_mode)(struct socfpga_dwmac *dwmac_priv);

	void (*setup_plat_dat)(struct socfpga_dwmac *dwmac_priv);

};



struct socfpga_dwmac {
@@ -441,6 +442,23 @@ static int socfpga_dwmac_init(struct platform_device *pdev, void *bsp_priv) 
	return dwmac->ops->set_phy_mode(dwmac);

}



static void socfpga_gen5_setup_plat_dat(struct socfpga_dwmac *dwmac)

{

	struct plat_stmmacenet_data *plat_dat = dwmac->plat_dat;



	plat_dat->core_type = DWMAC_CORE_GMAC;



	/* Rx watchdog timer in dwmac is buggy in this hw */

	plat_dat->riwt_off = 1;

}



static void socfpga_agilex5_setup_plat_dat(struct socfpga_dwmac *dwmac)

{

	struct plat_stmmacenet_data *plat_dat = dwmac->plat_dat;



	plat_dat->core_type = DWMAC_CORE_XGMAC;

}



static int socfpga_dwmac_probe(struct platform_device *pdev)

{

	struct plat_stmmacenet_data *plat_dat;
@@ -497,25 +515,31 @@ static int socfpga_dwmac_probe(struct platform_device *pdev) 
	plat_dat->pcs_init = socfpga_dwmac_pcs_init;

	plat_dat->pcs_exit = socfpga_dwmac_pcs_exit;

	plat_dat->select_pcs = socfpga_dwmac_select_pcs;

	plat_dat->core_type = DWMAC_CORE_GMAC;



	plat_dat->riwt_off = 1;

	ops->setup_plat_dat(dwmac);



	return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);

}



static const struct socfpga_dwmac_ops socfpga_gen5_ops = {

	.set_phy_mode = socfpga_gen5_set_phy_mode,

	.setup_plat_dat = socfpga_gen5_setup_plat_dat,

};



static const struct socfpga_dwmac_ops socfpga_gen10_ops = {

	.set_phy_mode = socfpga_gen10_set_phy_mode,

	.setup_plat_dat = socfpga_gen5_setup_plat_dat,

};



static const struct socfpga_dwmac_ops socfpga_agilex5_ops = {

	.set_phy_mode = socfpga_gen10_set_phy_mode,

	.setup_plat_dat = socfpga_agilex5_setup_plat_dat,

};



static const struct of_device_id socfpga_dwmac_match[] = {

	{ .compatible = "altr,socfpga-stmmac", .data = &socfpga_gen5_ops },

	{ .compatible = "altr,socfpga-stmmac-a10-s10", .data = &socfpga_gen10_ops },

	{ .compatible = "altr,socfpga-stmmac-agilex5", .data = &socfpga_gen10_ops },

	{ .compatible = "altr,socfpga-stmmac-agilex5", .data = &socfpga_agilex5_ops },

	{ }

};

MODULE_DEVICE_TABLE(of, socfpga_dwmac_match);