Commit 93d883f8 authored by Richard Zhu's avatar Richard Zhu Committed by Bjorn Helgaas
Browse files

PCI: imx6: Add missing reference clock disable logic 

Ensure the *_enable_ref_clk() function is symmetric by addressing missing
disable parts on some platforms.

Fixes: d0a75c79 ("PCI: imx6: Factor out ref clock disable to match enable")
Link: https://lore.kernel.org/r/20241126075702.4099164-7-hongxing.zhu@nxp.com


Signed-off-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
parent ef61c7d8

drivers/pci/controller/dwc/pci-imx6.c

+12 −12
Original line number Diff line number Diff line
@@ -600,10 +600,9 @@ static int imx_pcie_attach_pd(struct device *dev) 


static int imx6sx_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)

{

	if (enable)

		regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,

				  IMX6SX_GPR12_PCIE_TEST_POWERDOWN);



	regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,

			   IMX6SX_GPR12_PCIE_TEST_POWERDOWN,

			   enable ? 0 : IMX6SX_GPR12_PCIE_TEST_POWERDOWN);

	return 0;

}
@@ -632,19 +631,20 @@ static int imx8mm_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable) 
{

	int offset = imx_pcie_grp_offset(imx_pcie);



	if (enable) {

		regmap_clear_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE);

		regmap_set_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN);

	}



	regmap_update_bits(imx_pcie->iomuxc_gpr, offset,

			   IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE,

			   enable ? 0 : IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE);

	regmap_update_bits(imx_pcie->iomuxc_gpr, offset,

			   IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN,

			   enable ? IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN : 0);

	return 0;

}



static int imx7d_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)

{

	if (!enable)

		regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,

				IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);

	regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,

			   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,

			   enable ? 0 : IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);

	return 0;

}