Commit 93ef6ee5 authored by Jiawen Wu's avatar Jiawen Wu Committed by Paolo Abeni
Browse files

net: pcs: xpcs: fix the wrong register that was written back



The value is read from the register TXGBE_RX_GEN_CTL3, and it should be
written back to TXGBE_RX_GEN_CTL3 when it changes some fields.

Cc: stable@vger.kernel.org
Fixes: f629acc6 ("net: pcs: xpcs: support to switch mode for Wangxun NICs")
Signed-off-by: default avatarJiawen Wu <jiawenwu@trustnetic.com>
Reported-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/20240924022857.865422-1-jiawenwu@trustnetic.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 45c0de18
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+1 −1
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ static void txgbe_pma_config_1g(struct dw_xpcs *xpcs)
	txgbe_write_pma(xpcs, TXGBE_DFE_TAP_CTL0, 0);
	val = txgbe_read_pma(xpcs, TXGBE_RX_GEN_CTL3);
	val = u16_replace_bits(val, 0x4, TXGBE_RX_GEN_CTL3_LOS_TRSHLD0);
	txgbe_write_pma(xpcs, TXGBE_RX_EQ_ATTN_CTL, val);
	txgbe_write_pma(xpcs, TXGBE_RX_GEN_CTL3, val);

	txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL0, 0x20);
	txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL3, 0x46);