Commit 94564801 authored by Damien Le Moal's avatar Damien Le Moal Committed by Bjorn Helgaas
Browse files

PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations

Introduce the function rockchip_pcie_ep_init_ob_mem() allocate the
outbound memory regions and memory needed for IRQ handling.

These changes tidy up rockchip_pcie_ep_probe().

No functional change.

Link: https://lore.kernel.org/r/20241017015849.190271-9-dlemoal@kernel.org


Signed-off-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 2968534e
Loading
Loading
Loading
Loading
+61 −46
Original line number Diff line number Diff line
@@ -532,15 +532,66 @@ static const struct of_device_id rockchip_pcie_ep_of_match[] = {
	{},
};

static int rockchip_pcie_ep_init_ob_mem(struct rockchip_pcie_ep *ep)
{
	struct rockchip_pcie *rockchip = &ep->rockchip;
	struct device *dev = rockchip->dev;
	struct pci_epc_mem_window *windows = NULL;
	int err, i;

	ep->ob_addr = devm_kcalloc(dev, ep->max_regions, sizeof(*ep->ob_addr),
				   GFP_KERNEL);

	if (!ep->ob_addr)
		return -ENOMEM;

	windows = devm_kcalloc(dev, ep->max_regions,
			       sizeof(struct pci_epc_mem_window), GFP_KERNEL);
	if (!windows)
		return -ENOMEM;

	for (i = 0; i < ep->max_regions; i++) {
		windows[i].phys_base = rockchip->mem_res->start + (SZ_1M * i);
		windows[i].size = SZ_1M;
		windows[i].page_size = SZ_1M;
	}
	err = pci_epc_multi_mem_init(ep->epc, windows, ep->max_regions);
	devm_kfree(dev, windows);

	if (err < 0) {
		dev_err(dev, "failed to initialize the memory space\n");
		return err;
	}

	ep->irq_cpu_addr = pci_epc_mem_alloc_addr(ep->epc, &ep->irq_phys_addr,
						  SZ_1M);
	if (!ep->irq_cpu_addr) {
		dev_err(dev, "failed to reserve memory space for MSI\n");
		goto err_epc_mem_exit;
	}

	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;

	return 0;

err_epc_mem_exit:
	pci_epc_mem_exit(ep->epc);

	return err;
}

static void rockchip_pcie_ep_exit_ob_mem(struct rockchip_pcie_ep *ep)
{
	pci_epc_mem_exit(ep->epc);
}

static int rockchip_pcie_ep_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rockchip_pcie_ep *ep;
	struct rockchip_pcie *rockchip;
	struct pci_epc *epc;
	size_t max_regions;
	struct pci_epc_mem_window *windows = NULL;
	int err, i;
	int err;
	u32 cfg_msi, cfg_msix_cp;

	ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
@@ -564,10 +615,14 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
	if (err)
		return err;

	err = rockchip_pcie_enable_clocks(rockchip);
	err = rockchip_pcie_ep_init_ob_mem(ep);
	if (err)
		return err;

	err = rockchip_pcie_enable_clocks(rockchip);
	if (err)
		goto err_exit_ob_mem;

	err = rockchip_pcie_init_port(rockchip);
	if (err)
		goto err_disable_clocks;
@@ -576,47 +631,9 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
	rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
			    PCIE_CLIENT_CONFIG);

	max_regions = ep->max_regions;
	ep->ob_addr = devm_kcalloc(dev, max_regions, sizeof(*ep->ob_addr),
				   GFP_KERNEL);

	if (!ep->ob_addr) {
		err = -ENOMEM;
		goto err_uninit_port;
	}

	/* Only enable function 0 by default */
	rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);

	windows = devm_kcalloc(dev, ep->max_regions,
			       sizeof(struct pci_epc_mem_window), GFP_KERNEL);
	if (!windows) {
		err = -ENOMEM;
		goto err_uninit_port;
	}
	for (i = 0; i < ep->max_regions; i++) {
		windows[i].phys_base = rockchip->mem_res->start + (SZ_1M * i);
		windows[i].size = SZ_1M;
		windows[i].page_size = SZ_1M;
	}
	err = pci_epc_multi_mem_init(epc, windows, ep->max_regions);
	devm_kfree(dev, windows);

	if (err < 0) {
		dev_err(dev, "failed to initialize the memory space\n");
		goto err_uninit_port;
	}

	ep->irq_cpu_addr = pci_epc_mem_alloc_addr(epc, &ep->irq_phys_addr,
						  SZ_1M);
	if (!ep->irq_cpu_addr) {
		dev_err(dev, "failed to reserve memory space for MSI\n");
		err = -ENOMEM;
		goto err_epc_mem_exit;
	}

	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;

	/*
	 * MSI-X is not supported but the controller still advertises the MSI-X
	 * capability by default, which can lead to the Root Complex side
@@ -646,10 +663,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
	pci_epc_init_notify(epc);

	return 0;
err_epc_mem_exit:
	pci_epc_mem_exit(epc);
err_uninit_port:
	rockchip_pcie_deinit_phys(rockchip);
err_exit_ob_mem:
	rockchip_pcie_ep_exit_ob_mem(ep);
err_disable_clocks:
	rockchip_pcie_disable_clocks(rockchip);
	return err;