Unverified Commit 946bb33d authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Palmer Dabbelt
Browse files

riscv: split cache ops out of dma-noncoherent.c 



The cache ops are also used by the pmem code which is unconditionally
built into the kernel.  Move them into a separate file that is built
based on the correct config option.

Fixes: fd962781 ("riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT")
Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Tested-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> #
Link: https://lore.kernel.org/r/20231028155101.1039049-1-hch@lst.de


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent f367db71

arch/riscv/mm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -36,3 +36,4 @@ endif 


obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o

obj-$(CONFIG_RISCV_DMA_NONCOHERENT) += dma-noncoherent.o

obj-$(CONFIG_RISCV_NONSTANDARD_CACHE_OPS) += cache-ops.o

arch/riscv/mm/cache-ops.c

0 → 100644
+17 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2021 Western Digital Corporation or its affiliates.

 */



#include <asm/dma-noncoherent.h>



struct riscv_nonstd_cache_ops noncoherent_cache_ops __ro_after_init;



void

riscv_noncoherent_register_cache_ops(const struct riscv_nonstd_cache_ops *ops)

{

	if (!ops)

		return;

	noncoherent_cache_ops = *ops;

}

EXPORT_SYMBOL_GPL(riscv_noncoherent_register_cache_ops);

arch/riscv/mm/dma-noncoherent.c

+0 −15
Original line number Diff line number Diff line
@@ -15,12 +15,6 @@ static bool noncoherent_supported __ro_after_init; 
int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN;

EXPORT_SYMBOL_GPL(dma_cache_alignment);



struct riscv_nonstd_cache_ops noncoherent_cache_ops __ro_after_init = {

	.wback = NULL,

	.inv = NULL,

	.wback_inv = NULL,

};



static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t size)

{

	void *vaddr = phys_to_virt(paddr);
@@ -162,12 +156,3 @@ void __init riscv_set_dma_cache_alignment(void) 
	if (!noncoherent_supported)

		dma_cache_alignment = 1;

}
 


void riscv_noncoherent_register_cache_ops(const struct riscv_nonstd_cache_ops *ops)

{

	if (!ops)

		return;



	noncoherent_cache_ops = *ops;

}

EXPORT_SYMBOL_GPL(riscv_noncoherent_register_cache_ops);