Commit 9498f2e2 authored by Jouni Högander's avatar Jouni Högander Committed by Joonas Lahtinen
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drm/i915/psr: Do not wait for PSR being idle on on Panel Replay 



We do not have ALPM on DP Panel Replay. Due to this SRD_STATUS[SRD State]
doesn't change from SRDENT_ON after Panel Replay is enabled until it gets
disabled.

On eDP Panel Replay DEEP_SLEEP is not reached.
_psr2_ready_for_pipe_update_locked is waiting DEEP_SLEEP bit getting reset.

Take these into account in Panel Replay code by not waiting PSR getting
idle after enabling VBI.

Fixes: 29fb595d ("drm/i915/psr: Panel replay uses SRD_STATUS to track it's status")
Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240906070033.289015-5-jouni.hogander@intel.com


(cherry picked from commit a2d98feb)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent bf05aeac

drivers/gpu/drm/i915/display/intel_psr.c

+2 −11
Original line number Diff line number Diff line
@@ -2784,13 +2784,6 @@ static int _psr1_ready_for_pipe_update_locked(struct intel_dp *intel_dp) 
				       EDP_PSR_STATUS_STATE_MASK, 50);

}



static int _panel_replay_ready_for_pipe_update_locked(struct intel_dp *intel_dp)

{

	return intel_dp_is_edp(intel_dp) ?

		_psr2_ready_for_pipe_update_locked(intel_dp) :

		_psr1_ready_for_pipe_update_locked(intel_dp);

}



/**

 * intel_psr_wait_for_idle_locked - wait for PSR be ready for a pipe update

 * @new_crtc_state: new CRTC state
@@ -2813,12 +2806,10 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat 


		lockdep_assert_held(&intel_dp->psr.lock);



		if (!intel_dp->psr.enabled)

		if (!intel_dp->psr.enabled || intel_dp->psr.panel_replay_enabled)

			continue;



		if (intel_dp->psr.panel_replay_enabled)

			ret = _panel_replay_ready_for_pipe_update_locked(intel_dp);

		else if (intel_dp->psr.sel_update_enabled)

		if (intel_dp->psr.sel_update_enabled)

			ret = _psr2_ready_for_pipe_update_locked(intel_dp);

		else

			ret = _psr1_ready_for_pipe_update_locked(intel_dp);