Commit 94a08721 authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Danilo Krummrich
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gpu: nova-core: increase BAR0 size to 16MB 



The Turing+ register address space spans over that range, so increase it
as future patches will access more registers.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Link: https://lore.kernel.org/r/20250619-nova-frts-v6-10-ecf41ef99252@nvidia.com


Signed-off-by: default avatarDanilo Krummrich <dakr@kernel.org>
parent e66aaaff

drivers/gpu/nova-core/driver.rs

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0



use kernel::{auxiliary, bindings, c_str, device::Core, pci, prelude::*};

use kernel::{auxiliary, bindings, c_str, device::Core, pci, prelude::*, sizes::SZ_16M};



use crate::gpu::Gpu;
@@ -11,7 +11,7 @@ pub(crate) struct NovaCore { 
    _reg: auxiliary::Registration,

}



const BAR0_SIZE: usize = 8;

const BAR0_SIZE: usize = SZ_16M;

pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;



kernel::pci_device_table!(