Commit 94adb993 authored by Leo (Hanghong) Ma's avatar Leo (Hanghong) Ma Committed by Alex Deucher
Browse files

drm/amd/display: Add visual confirm color support for SubVP 



[Why && How]
We would like to have visual confirm color support for SubVP.
	1. Set visual confirm color to red: SubVP is enable on this
	display;
	2. Set visual confirm color to green: SubVP is enable on
	other display and DRR is on this display;
	3. Set visual confirm color to blue: SubVP is enable on
	other display and DRR is off on this display;

Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarBrian Chang <Brian.Chang@amd.com>
Signed-off-by: default avatarLeo (Hanghong) Ma <hanghong.ma@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0991f44c

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+38 −0
Original line number Diff line number Diff line
@@ -402,6 +402,44 @@ void get_hdr_visual_confirm_color( 
	}

}



void get_subvp_visual_confirm_color(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx,

		struct tg_color *color)

{

	uint32_t color_value = MAX_TG_COLOR_VALUE;

	bool enable_subvp = false;

	int i;



	if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx)

		return;



	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];



	if (pipe->stream && pipe->stream->mall_stream_config.paired_stream &&

				pipe->stream->mall_stream_config.type == SUBVP_MAIN) {

			/* SubVP enable - red */

			color->color_r_cr = color_value;

			enable_subvp = true;



			if (pipe_ctx->stream == pipe->stream)

				return;

			break;

		}

	}



	if (enable_subvp && pipe_ctx->stream->mall_stream_config.type == SUBVP_NONE) {

		color->color_r_cr = 0;

		if (pipe_ctx->stream->ignore_msa_timing_param == 1)

			/* SubVP enable and DRR on - green */

			color->color_g_y = color_value;

		else

			/* SubVP enable and No DRR - blue */

			color->color_b_cb = color_value;

	}

}



void get_surface_tile_visual_confirm_color(

		struct pipe_ctx *pipe_ctx,

		struct tg_color *color)

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -417,6 +417,7 @@ enum visual_confirm { 
	VISUAL_CONFIRM_SWAPCHAIN = 6,

	VISUAL_CONFIRM_FAMS = 7,

	VISUAL_CONFIRM_SWIZZLE = 9,

	VISUAL_CONFIRM_SUBVP = 14,

};



enum dc_psr_power_opts {

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+2 −0
Original line number Diff line number Diff line
@@ -2465,6 +2465,8 @@ void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, 
		get_mpctree_visual_confirm_color(pipe_ctx, color);

	else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)

		get_surface_tile_visual_confirm_color(pipe_ctx, color);

	else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SUBVP)

		get_subvp_visual_confirm_color(dc, pipe_ctx, color);



	if (mpc->funcs->set_bg_color) {

		memcpy(&pipe_ctx->plane_state->visual_confirm_color, color, sizeof(struct tg_color));

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h

+5 −0
Original line number Diff line number Diff line
@@ -273,6 +273,11 @@ void get_surface_visual_confirm_color( 
		const struct pipe_ctx *pipe_ctx,

		struct tg_color *color);



void get_subvp_visual_confirm_color(

	struct dc *dc,

	struct pipe_ctx *pipe_ctx,

	struct tg_color *color);



void get_hdr_visual_confirm_color(

		struct pipe_ctx *pipe_ctx,

		struct tg_color *color);