Commit 94b0908b authored by Victor Lu's avatar Victor Lu Committed by Alex Deucher
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drm/amdgpu: Do not set power brake sequence for Aldebaran SRIOV



Aldebaran SRIOV VF cannot access the power brake feature regs.
The accesses can be skipped to avoid a dmesg warning.

v2: Remove redundant asic type check

Signed-off-by: default avatarVictor Lu <victorchengchi.lu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 14c8097b
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+2 −1
Original line number Diff line number Diff line
@@ -4045,7 +4045,8 @@ static int gfx_v9_0_hw_init(struct amdgpu_ip_block *ip_block)
	if (r)
		return r;

	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2))
	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) &&
	    !amdgpu_sriov_vf(adev))
		gfx_v9_4_2_set_power_brake_sequence(adev);

	return r;