Commit 9520b1d0 authored Oct 28, 2022 by Dave Airlie

Merge tag 'drm-intel-fixes-2022-10-27-1' of...

Merge tag 'drm-intel-fixes-2022-10-27-1' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

- Extend Wa_1607297627 to Alderlake-P (José Roberto de Souza)
- Keep PCI autosuspend control 'on' by default on all dGPU (Anshuman Gupta)
- Reset frl trained flag before restarting FRL training (Ankit Nautiyal)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Y1o+teE2Z11pT1MN@tursulin-desk

parents 200ec44a 63720a56

drivers/gpu/drm/i915/display/intel_dp.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -3957,6 +3957,8 @@ intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp)

		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, &intel_dp->attached_connector->base);

		intel_dp->frl.is_trained = false;

		/* Restart FRL training or fall back to TMDS mode */
		intel_dp_check_frl_training(intel_dp);
		}

drivers/gpu/drm/i915/gt/intel_workarounds.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -2293,11 +2293,11 @@ rcs_engine_wa_init(struct intel_engine_cs engine, struct i915_wa_list wal)
		}

		if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) \|\|
		IS_ROCKETLAKE(i915) \|\| IS_TIGERLAKE(i915)) {
		IS_ROCKETLAKE(i915) \|\| IS_TIGERLAKE(i915) \|\| IS_ALDERLAKE_P(i915)) {
		/*
		* Wa_1607030317:tgl
		* Wa_1607186500:tgl
		* Wa_1607297627:tgl,rkl,dg1[a0]
		* Wa_1607297627:tgl,rkl,dg1[a0],adlp
		*
		* On TGL and RKL there are multiple entries for this WA in the
		* BSpec; some indicate this is an A0-only WA, others indicate

drivers/gpu/drm/i915/intel_runtime_pm.c

+9 −2

Original line number	Diff line number	Diff line
		@@ -591,7 +591,14 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm)
		pm_runtime_use_autosuspend(kdev);
		}

		/* Enable by default */
		/*
		* FIXME: Temp hammer to keep autosupend disable on lmem supported platforms.
		* As per PCIe specs 5.3.1.4.1, all iomem read write request over a PCIe
		* function will be unsupported in case PCIe endpoint function is in D3.
		* Let's keep i915 autosuspend control 'on' till we fix all known issue
		* with lmem access in D3.
		*/
		if (!IS_DGFX(i915))
		pm_runtime_allow(kdev);

		/*