Commit 954d5986 authored Apr 13, 2021 by Peter Robinson Committed by Heiko Stuebner May 10, 2021

arm64: dts: rockchip: Use only supported PCIe link speed on rk3399



The max link speed supported by the rk3399 is already set in the
rk3399.dtsi file so don't set unsupported link speeds in device
specific DTs. This is the same fix as 642fb279.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20210413141709.845592-1-pbrobinson@gmail.com


Signed-off-by: Heiko Stuebner <heiko@sntech.de>

parent 642593ee

arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi

+0 −1

Original line number	Diff line number	Diff line
		@@ -510,7 +510,6 @@ &pcie_phy {
		};

		&pcie0 {
		max-link-speed = <2>;
		num-lanes = <2>;
		vpcie0v9-supply = <&vcca0v9_s3>;
		vpcie1v8-supply = <&vcca1v8_s3>;

arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi

+0 −1

Original line number	Diff line number	Diff line
		@@ -474,7 +474,6 @@ &pcie_phy {

		&pcie0 {
		ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
		max-link-speed = <2>;
		num-lanes = <4>;
		pinctrl-0 = <&pcie_clkreqnb_cpm>;
		pinctrl-names = "default";

arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi

+0 −1

Original line number	Diff line number	Diff line
		@@ -329,7 +329,6 @@ &pcie_phy {

		&pcie0 {
		ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
		max-link-speed = <2>;
		num-lanes = <4>;
		pinctrl-0 = <&pcie_clkreqnb_cpm>;
		pinctrl-names = "default";