Commit 95aca43b authored by Jacob Keller's avatar Jacob Keller Committed by Tony Nguyen
Browse files

ice: use read_poll_timeout_atomic in ice_read_phy_tstamp_ll_e810 



The ice_read_phy_tstamp_ll_e810 function repeatedly reads the PF_SB_ATQBAL
register until the TS_LL_READ_TS bit is cleared. This is a perfect
candidate for using rd32_poll_timeout. However, the default implementation
uses a sleep-based wait. Use read_poll_timeout_atomic macro which is based
on the non-sleeping implementation and use it to replace the loop reading
in the ice_read_phy_tstamp_ll_e810 function.

Co-developed-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: default avatarAnton Nadezhdin <anton.nadezhdin@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 4c9f13a6

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

+14 −17
Original line number Diff line number Diff line
@@ -4858,32 +4858,29 @@ static int 
ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo)

{

	u32 val;

	u8 i;

	int err;



	/* Write TS index to read to the PF register so the FW can read it */

	val = FIELD_PREP(TS_LL_READ_TS_IDX, idx) | TS_LL_READ_TS;

	wr32(hw, PF_SB_ATQBAL, val);



	/* Read the register repeatedly until the FW provides us the TS */

	for (i = TS_LL_READ_RETRIES; i > 0; i--) {

		val = rd32(hw, PF_SB_ATQBAL);

	err = read_poll_timeout_atomic(rd32, val,

				       !FIELD_GET(TS_LL_READ_TS, val), 10,

				       TS_LL_READ_TIMEOUT, false, hw,

				       PF_SB_ATQBAL);

	if (err) {

		ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");

		return err;

	}



		/* When the bit is cleared, the TS is ready in the register */

		if (!(FIELD_GET(TS_LL_READ_TS, val))) {

	/* High 8 bit value of the TS is on the bits 16:23 */

	*hi = FIELD_GET(TS_LL_READ_TS_HIGH, val);



	/* Read the low 32 bit value and set the TS valid bit */

	*lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID;

			return 0;

		}



		udelay(10);

	}



	/* FW failed to provide the TS in time */

	ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");

	return -EINVAL;

	return 0;

}



/**

drivers/net/ethernet/intel/ice/ice_ptp_hw.h

+1 −1
Original line number Diff line number Diff line
@@ -689,7 +689,7 @@ static inline bool ice_is_dual(struct ice_hw *hw) 
#define BYTES_PER_IDX_ADDR_L		4



/* Tx timestamp low latency read definitions */

#define TS_LL_READ_RETRIES		200

#define TS_LL_READ_TIMEOUT		2000

#define TS_LL_READ_TS_HIGH		GENMASK(23, 16)

#define TS_LL_READ_TS_IDX		GENMASK(29, 24)

#define TS_LL_READ_TS_INTR		BIT(30)