Commit 96355be8 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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dt-bindings: pinctrl: renesas: Document RZ/Five SoC 



RZ/Five SoC is pin compatible with RZ/G2UL (Type 1) SoC. This patch
updates the comment to include RZ/Five SoC so that we make it clear
"renesas,r9a07g043-pinctrl" compatible string will be used for RZ/Five
SoC.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220726175315.1147-1-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 568035b0

Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ properties: 
    oneOf:

      - items:

          - enum:

              - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2}

              - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five

              - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}



      - items: