Commit 964a80cf authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Greg Kroah-Hartman
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dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support 



Document support for the Serial Communication Interface with FIFO (SCIF)
available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
(R9A07G044) SoC, with the following differences:

- RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
  and two for Rx and Tx buffer full, all of which are edge-triggered.
- RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
  synchronous and asynchronous modes.
- There are differences in the configuration of certain registers such
  as SCSMR, SCFCR, and SCSPTR between the two SoCs.

To handle these differences in the driver, a new SoC-specific compatible
string is added, ensuring proper handling of the unique features and
register configurations of the RZ/V2H(P) SoC.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240604170513.522631-5-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 034e4422

Documentation/devicetree/bindings/serial/renesas,scif.yaml

+30 −0
Original line number Diff line number Diff line
@@ -80,6 +80,8 @@ properties: 
              - renesas,scif-r9a08g045      # RZ/G3S

          - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback



      - const: renesas,scif-r9a09g057       # RZ/V2H(P)



  reg:

    maxItems: 1
@@ -94,6 +96,9 @@ properties: 
          - description: Break interrupt

          - description: Data Ready interrupt

          - description: Transmit End interrupt

          - description: Transmit End/Data Ready interrupt

          - description: Receive buffer full interrupt (EDGE trigger)

          - description: Transmit buffer empty interrupt (EDGE trigger)

        minItems: 4



  interrupt-names:
@@ -105,6 +110,9 @@ properties: 
      - const: bri

      - const: dri

      - const: tei

      - const: tei-dri

      - const: rxi-edge

      - const: txi-edge



  clocks:

    minItems: 1
@@ -161,6 +169,7 @@ allOf: 
              - renesas,rcar-gen3-scif

              - renesas,rcar-gen4-scif

              - renesas,scif-r9a07g044

              - renesas,scif-r9a09g057

    then:

      required:

        - resets
@@ -210,9 +219,30 @@ allOf: 
      properties:

        interrupts:

          minItems: 6

          maxItems: 6



        interrupt-names:

          minItems: 6

          maxItems: 6



  - if:

      properties:

        compatible:

          contains:

            const: renesas,scif-r9a09g057

    then:

      properties:

        clocks:

          maxItems: 1



        clock-names:

          maxItems: 1



        interrupts:

          minItems: 9



        interrupt-names:

          minItems: 9



unevaluatedProperties: false