Commit 968e9fd1 authored by Mika Kahola's avatar Mika Kahola
Browse files

drm/i915/lt_phy: Replace crtc compute clock 



The existing DPLL compute clock callback for the XE3PLPD platform
(`xe3plpd_crtc_compute_clock`) was specific to that platform. Replace it
with the more generic Haswell (`hsw_crtc_compute_clock`) implementation
so that the compute clock path does not rely on the XE3PLPD hook.

Signed-off-by: default avatarMika Kahola <mika.kahola@intel.com>
Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-25-mika.kahola@intel.com
parent 29b37427

drivers/gpu/drm/i915/display/intel_dpll.c

+1 −24
Original line number Diff line number Diff line
@@ -1212,29 +1212,6 @@ static int dg2_crtc_compute_clock(struct intel_atomic_state *state, 
	return 0;

}



static int xe3plpd_crtc_compute_clock(struct intel_atomic_state *state,

				      struct intel_crtc *crtc)

{

	struct intel_crtc_state *crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	struct intel_encoder *encoder =

		intel_get_crtc_new_encoder(state, crtc_state);

	struct intel_display *display = to_intel_display(encoder);

	int ret;



	ret = intel_lt_phy_pll_calc_state(crtc_state, encoder, &crtc_state->dpll_hw_state);

	if (ret)

		return ret;



	/* TODO: Do the readback via intel_compute_shared_dplls() */

	crtc_state->port_clock =

			intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll);



	crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state);



	return 0;

}



static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state)

{

	struct intel_display *display = to_intel_display(crtc_state);
@@ -1695,7 +1672,7 @@ static int i8xx_crtc_compute_clock(struct intel_atomic_state *state, 
}



static const struct intel_dpll_global_funcs xe3plpd_dpll_funcs = {

	.crtc_compute_clock = xe3plpd_crtc_compute_clock,

	.crtc_compute_clock = hsw_crtc_compute_clock,

	.crtc_get_dpll = hsw_crtc_get_dpll,

};