Commit 969a38be authored by Andy Yan's avatar Andy Yan Committed by Vinod Koul
Browse files

phy: rockchip: usbdp: Only verify link rates/lanes/voltage when the corresponding set flags are set 



According documentation of phy_configure_opts_dp, at the configure
stage, link rates should only be verify/configure when set_rate
flag is set, the same applies to lanes and voltage.

So do it as the documentation says.
Because voltage setting depends on the lanes, link rates set
previously, so record the link rates and lanes at it's verify stage.

Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20250312080041.524546-1-andyshrk@163.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent ebf198f1

drivers/phy/rockchip/phy-rockchip-usbdp.c

+53 −34
Original line number Diff line number Diff line
@@ -187,6 +187,8 @@ struct rk_udphy { 
	u32 dp_aux_din_sel;

	bool dp_sink_hpd_sel;

	bool dp_sink_hpd_cfg;

	unsigned int link_rate;

	unsigned int lanes;

	u8 bw;

	int id;
@@ -1103,15 +1105,19 @@ static int rk_udphy_dp_phy_power_off(struct phy *phy) 
	return 0;

}



static int rk_udphy_dp_phy_verify_link_rate(unsigned int link_rate)

/*

 * Verify link rate

 */

static int rk_udphy_dp_phy_verify_link_rate(struct rk_udphy *udphy,

					    struct phy_configure_opts_dp *dp)

{

	switch (link_rate) {

	switch (dp->link_rate) {

	case 1620:

	case 2700:

	case 5400:

	case 8100:

		udphy->link_rate = dp->link_rate;

		break;



	default:

		return -EINVAL;

	}
@@ -1119,35 +1125,35 @@ static int rk_udphy_dp_phy_verify_link_rate(unsigned int link_rate) 
	return 0;

}



static int rk_udphy_dp_phy_verify_config(struct rk_udphy *udphy,

static int rk_udphy_dp_phy_verify_lanes(struct rk_udphy *udphy,

					struct phy_configure_opts_dp *dp)

{

	int i, ret;



	/* If changing link rate was required, verify it's supported. */

	ret = rk_udphy_dp_phy_verify_link_rate(dp->link_rate);

	if (ret)

		return ret;



	/* Verify lane count. */

	switch (dp->lanes) {

	case 1:

	case 2:

	case 4:

		/* valid lane count. */

		udphy->lanes = dp->lanes;

		break;



	default:

		return -EINVAL;

	}



	return 0;

}



/*

 * If changing voltages is required, check swing and pre-emphasis

 * levels, per-lane.

 */

	if (dp->set_voltages) {

static int rk_udphy_dp_phy_verify_voltages(struct rk_udphy *udphy,

					   struct phy_configure_opts_dp *dp)

{

	int i;



	/* Lane count verified previously. */

		for (i = 0; i < dp->lanes; i++) {

	for (i = 0; i < udphy->lanes; i++) {

		if (dp->voltage[i] > 3 || dp->pre[i] > 3)

			return -EINVAL;
@@ -1158,7 +1164,6 @@ static int rk_udphy_dp_phy_verify_config(struct rk_udphy *udphy, 
		if (dp->voltage[i] + dp->pre[i] > 3)

			return -EINVAL;

	}

	}



	return 0;

}
@@ -1197,9 +1202,23 @@ static int rk_udphy_dp_phy_configure(struct phy *phy, 
	u32 i, val, lane;

	int ret;



	ret = rk_udphy_dp_phy_verify_config(udphy, dp);

	if (dp->set_rate) {

		ret = rk_udphy_dp_phy_verify_link_rate(udphy, dp);

		if (ret)

			return ret;

	}



	if (dp->set_lanes) {

		ret = rk_udphy_dp_phy_verify_lanes(udphy, dp);

		if (ret)

			return ret;

	}



	if (dp->set_voltages) {

		ret = rk_udphy_dp_phy_verify_voltages(udphy, dp);

		if (ret)

			return ret;

	}



	if (dp->set_rate) {

		regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET,
@@ -1244,9 +1263,9 @@ static int rk_udphy_dp_phy_configure(struct phy *phy, 
	}



	if (dp->set_voltages) {

		for (i = 0; i < dp->lanes; i++) {

		for (i = 0; i < udphy->lanes; i++) {

			lane = udphy->dp_lane_sel[i];

			switch (dp->link_rate) {

			switch (udphy->link_rate) {

			case 1620:

			case 2700:

				regmap_update_bits(udphy->pma_regmap,