Commit 97f038db authored by Jessica Zhang's avatar Jessica Zhang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Enable widebus for DSI INTF 



DPU supports a data-bus widen mode for DSI INTF.

Enable this mode for all supported chipsets if widebus is enabled for DSI.

Signed-off-by: default avatarJessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/553756/
Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-2-9dc86083d6ea@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 14be80ae

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+5 −2
Original line number Diff line number Diff line
@@ -1196,15 +1196,18 @@ static void dpu_encoder_virt_atomic_enable(struct drm_encoder *drm_enc, 
	struct drm_display_mode *cur_mode = NULL;

	struct msm_drm_private *priv = drm_enc->dev->dev_private;

	struct msm_display_info *disp_info;

	int index;



	dpu_enc = to_dpu_encoder_virt(drm_enc);

	disp_info = &dpu_enc->disp_info;

	index = disp_info->h_tile_instance[0];



	dpu_enc->dsc = dpu_encoder_get_dsc_config(drm_enc);



	if (disp_info->intf_type == INTF_DP)

		dpu_enc->wide_bus_en = msm_dp_wide_bus_available(

				priv->dp[disp_info->h_tile_instance[0]]);

		dpu_enc->wide_bus_en = msm_dp_wide_bus_available(priv->dp[index]);

	else if (disp_info->intf_type == INTF_DSI)

		dpu_enc->wide_bus_en = msm_dsi_wide_bus_enabled(priv->dsi[index]);



	mutex_lock(&dpu_enc->enc_lock);

	cur_mode = &dpu_enc->base.crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+2 −0
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg( 
	if (intf_cfg.dsc != 0)

		cmd_mode_cfg.data_compress = true;



	cmd_mode_cfg.wide_bus_en = dpu_encoder_is_widebus_enabled(phys_enc->parent);



	if (phys_enc->hw_intf->ops.program_intf_cmd_cfg)

		phys_enc->hw_intf->ops.program_intf_cmd_cfg(phys_enc->hw_intf, &cmd_mode_cfg);

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c

+7 −0
Original line number Diff line number Diff line
@@ -521,6 +521,9 @@ static void dpu_hw_intf_program_intf_cmd_cfg(struct dpu_hw_intf *ctx, 
	if (cmd_mode_cfg->data_compress)

		intf_cfg2 |= INTF_CFG2_DCE_DATA_COMPRESS;



	if (cmd_mode_cfg->wide_bus_en)

		intf_cfg2 |= INTF_CFG2_DATABUS_WIDEN;



	DPU_REG_WRITE(&ctx->hw, INTF_CONFIG2, intf_cfg2);

}
@@ -545,6 +548,10 @@ static void _setup_intf_ops(struct dpu_hw_intf_ops *ops, 
		ops->disable_autorefresh = dpu_hw_intf_disable_autorefresh;

	}



	/* Technically, INTF_CONFIG2 is present for DPU 5.0+, but

	 * we can configure it for DPU 7.0+ since the wide bus and DSC flags

	 * would not be set for DPU < 7.0 anyways

	 */

	if (mdss_rev->core_major_ver >= 7)

		ops->program_intf_cmd_cfg = dpu_hw_intf_program_intf_cmd_cfg;

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ struct dpu_hw_intf_status { 


struct dpu_hw_intf_cmd_mode_cfg {

	u8 data_compress;	/* enable data compress between dpu and dsi */

	u8 wide_bus_en;		/* enable databus widen mode */

};



/**

drivers/gpu/drm/msm/dsi/dsi.c

+5 −0
Original line number Diff line number Diff line
@@ -17,6 +17,11 @@ struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) 
	return msm_dsi_host_get_dsc_config(msm_dsi->host);

}



bool msm_dsi_wide_bus_enabled(struct msm_dsi *msm_dsi)

{

	return false;

}



static int dsi_get_phy(struct msm_dsi *msm_dsi)

{

	struct platform_device *pdev = msm_dsi->pdev;