Commit 982313c3 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Vinod Koul
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phy: ralink: phy-mt7621-pci: fix XTAL bitmask 



When this was rewriten to get mainlined and start to
use 'linux/bitfield.h' headers, XTAL_MASK was wrong.
It must mask three bits but only two were used. Hence
properly fix it to make things work.

Fixes: d87da323 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY")
Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210302105412.16221-1-sergio.paracuellos@gmail.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent ed9e07f8

drivers/phy/ralink/phy-mt7621-pci.c

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ 


#define RG_PE1_FRC_MSTCKDIV			BIT(5)



#define XTAL_MASK				GENMASK(7, 6)

#define XTAL_MASK				GENMASK(8, 6)



#define MAX_PHYS	2