Commit 9828a1cf authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

perf/x86/intel/uncore: Switch to new Intel CPU model defines 



New CPU #defines encode vendor and family as well as model.

  [ bp: Squash *three* uncore patches into one. ]

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181501.41557-1-tony.luck%40intel.com
parent a7011b85

arch/x86/events/intel/uncore.c

+50 −50
Original line number Diff line number Diff line
@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = { 
};



static const struct x86_cpu_id intel_uncore_match[] __initconst = {

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&snb_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&ivb_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&bdw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&bdw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&snbep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&nhmex_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&nhmex_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&ivbep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&hswep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&bdx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&bdx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&knl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&knl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&skx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI,	&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&icx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&icx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&tgl_l_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&tgl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&rkl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&mtl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&mtl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&spr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&spr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&snr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM_EP,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE_EP,	&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_SANDYBRIDGE,	&snb_uncore_init),

	X86_MATCH_VFM(INTEL_IVYBRIDGE,		&ivb_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_L,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_G,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL,		&bdw_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_G,	&bdw_uncore_init),

	X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,	&snbep_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM_EX,		&nhmex_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE_EX,	&nhmex_uncore_init),

	X86_MATCH_VFM(INTEL_IVYBRIDGE_X,	&ivbep_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_X,		&hswep_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_X,	&bdx_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_D,	&bdx_uncore_init),

	X86_MATCH_VFM(INTEL_XEON_PHI_KNL,	&knl_uncore_init),

	X86_MATCH_VFM(INTEL_XEON_PHI_KNM,	&knl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE_L,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE_X,		&skx_uncore_init),

	X86_MATCH_VFM(INTEL_KABYLAKE_L,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_KABYLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_COMETLAKE_L,	&skl_uncore_init),

	X86_MATCH_VFM(INTEL_COMETLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_L,		&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_NNPI,	&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE,		&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_D,		&icx_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_X,		&icx_uncore_init),

	X86_MATCH_VFM(INTEL_TIGERLAKE_L,	&tgl_l_uncore_init),

	X86_MATCH_VFM(INTEL_TIGERLAKE,		&tgl_uncore_init),

	X86_MATCH_VFM(INTEL_ROCKETLAKE,		&rkl_uncore_init),

	X86_MATCH_VFM(INTEL_ALDERLAKE,		&adl_uncore_init),

	X86_MATCH_VFM(INTEL_ALDERLAKE_L,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE,		&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_METEORLAKE,		&mtl_uncore_init),

	X86_MATCH_VFM(INTEL_METEORLAKE_L,	&mtl_uncore_init),

	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,	&spr_uncore_init),

	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,	&spr_uncore_init),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,	&snr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,	&gnr_uncore_init),

	{},

};

MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);

arch/x86/events/intel/uncore_nhmex.c

+2 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* Nehalem-EX/Westmere-EX uncore support */

#include <asm/cpu_device_id.h>

#include "uncore.h"



/* NHM-EX event control */
@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = { 


void nhmex_uncore_cpu_init(void)

{

	if (boot_cpu_data.x86_model == 46)

	if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)

		uncore_nhmex = true;

	else

		nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;

arch/x86/events/intel/uncore_snbep.c

+3 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* SandyBridge-EP/IvyTown uncore support */

#include <asm/cpu_device_id.h>

#include "uncore.h"

#include "uncore_discovery.h"
@@ -3285,7 +3286,7 @@ void bdx_uncore_cpu_init(void) 
	uncore_msr_uncores = bdx_msr_uncores;



	/* Detect systems with no SBOXes */

	if ((boot_cpu_data.x86_model == 86) || hswep_has_limit_sbox(BDX_PCU_DID))

	if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_D || hswep_has_limit_sbox(BDX_PCU_DID))

		uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;



	hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
@@ -5394,7 +5395,7 @@ static int icx_iio_get_topology(struct intel_uncore_type *type) 
static void icx_iio_set_mapping(struct intel_uncore_type *type)

{

	/* Detect ICX-D system. This case is not supported */

	if (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_D) {

	if (boot_cpu_data.x86_vfm == INTEL_ICELAKE_D) {

		pmu_clear_mapping_attr(type->attr_update, &icx_iio_mapping_group);

		return;

	}