Unverified Commit 982a7eb9 authored by Palmer Dabbelt's avatar Palmer Dabbelt
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Documentation: RISC-V: uabi: Only scalar misaligned loads are supported 



We're stuck supporting scalar misaligned loads in userspace because they
were part of the ISA at the time we froze the uABI.  That wasn't the
case for vector misaligned accesses, so depending on them
unconditionally is a userspace bug.  All extant vector hardware traps on
these misaligned accesses.

Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240524185600.5919-1-palmer@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 7bed5161

Documentation/arch/riscv/uabi.rst

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Original line number Diff line number Diff line
@@ -65,4 +65,6 @@ the extension, or may have deliberately removed it from the listing. 
Misaligned accesses

-------------------



Misaligned accesses are supported in userspace, but they may perform poorly.
 
Misaligned scalar accesses are supported in userspace, but they may perform

poorly.  Misaligned vector accesses are only supported if the Zicclsm extension

is supported.