Commit 998fde06 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe: Move forcewake to 'gt.pm' substructure 



Forcewake is a general GT power management concept that isn't specific
to MMIO register access.  Move the forcewake information for a GT out of
the 'mmio' substruct and into a 'pm' substruct.  Also use the gt_to_fw()
helper in a few more places where it was being open-coded.

v2:
 - Kerneldoc tweaks.  (Lucas)

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-46-matthew.d.roper@intel.com
parent c7c3c7b7

drivers/gpu/drm/xe/xe_device.h

+1 −1
Original line number Diff line number Diff line
@@ -138,7 +138,7 @@ static inline bool xe_device_uc_enabled(struct xe_device *xe) 


static inline struct xe_force_wake *gt_to_fw(struct xe_gt *gt)

{

	return &gt->mmio.fw;

	return &gt->pm.fw;

}



void xe_device_assert_mem_access(struct xe_device *xe);

drivers/gpu/drm/xe/xe_gt_types.h

+12 −3
Original line number Diff line number Diff line
@@ -145,11 +145,9 @@ struct xe_gt { 
	/**

	 * @mmio: mmio info for GT.  All GTs within a tile share the same

	 * register space, but have their own copy of GSI registers at a

	 * specific offset, as well as their own forcewake handling.

	 * specific offset.

	 */

	struct {

		/** @mmio.fw: force wake for GT */

		struct xe_force_wake fw;

		/**

		 * @mmio.adj_limit: adjust MMIO address if address is below this

		 * value
@@ -159,6 +157,17 @@ struct xe_gt { 
		u32 adj_offset;

	} mmio;



	/**

	 * @pm: power management info for GT.  The driver uses the GT's

	 * "force wake" interface to wake up specific parts of the GT hardware

	 * from C6 sleep states and ensure the hardware remains awake while it

	 * is being actively used.

	 */

	struct {

		/** @pm.fw: force wake for GT */

		struct xe_force_wake fw;

	} pm;



	/** @sriov: virtualization data related to GT */

	union {

		/** @sriov.pf: PF data. Valid only if driver is running as PF */

drivers/gpu/drm/xe/xe_reg_sr.c

+5 −4
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 


#include "regs/xe_engine_regs.h"

#include "regs/xe_gt_regs.h"

#include "xe_device.h"

#include "xe_device_types.h"

#include "xe_force_wake.h"

#include "xe_gt.h"
@@ -194,14 +195,14 @@ void xe_reg_sr_apply_mmio(struct xe_reg_sr *sr, struct xe_gt *gt) 


	xe_gt_dbg(gt, "Applying %s save-restore MMIOs\n", sr->name);



	err = xe_force_wake_get(&gt->mmio.fw, XE_FORCEWAKE_ALL);

	err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	if (err)

		goto err_force_wake;



	xa_for_each(&sr->xa, reg, entry)

		apply_one_mmio(gt, entry);



	err = xe_force_wake_put(&gt->mmio.fw, XE_FORCEWAKE_ALL);

	err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	XE_WARN_ON(err);



	return;
@@ -227,7 +228,7 @@ void xe_reg_sr_apply_whitelist(struct xe_hw_engine *hwe) 


	drm_dbg(&xe->drm, "Whitelisting %s registers\n", sr->name);



	err = xe_force_wake_get(&gt->mmio.fw, XE_FORCEWAKE_ALL);

	err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	if (err)

		goto err_force_wake;
@@ -253,7 +254,7 @@ void xe_reg_sr_apply_whitelist(struct xe_hw_engine *hwe) 
		xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), addr);

	}



	err = xe_force_wake_put(&gt->mmio.fw, XE_FORCEWAKE_ALL);

	err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	XE_WARN_ON(err);



	return;