Commit 999ef874 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/pmu: Initialize PMU event types based on first available GT 



GT ID#0 (primary GT on tile 0) may not always be available if the
primary GT has been disabled via configfs.  Instead use the first
available GT when determining which PMU events are supported.  If there
are no GTs, then don't advertise any GT-related events.

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20251013200944.2499947-36-matthew.d.roper@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent 090e7fc4

drivers/gpu/drm/xe/xe_pmu.c

+10 −1
Original line number Diff line number Diff line
@@ -497,7 +497,12 @@ static const struct attribute_group *pmu_events_attr_update[] = { 
static void set_supported_events(struct xe_pmu *pmu)

{

	struct xe_device *xe = container_of(pmu, typeof(*xe), pmu);

	struct xe_gt *gt = xe_device_get_gt(xe, 0);

	struct xe_gt *gt;

	int id;



	/* If there are no GTs, don't support any GT-related events */

	if (xe->info.gt_count == 0)

		return;



	if (!xe->info.skip_guc_pc) {

		pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_GT_C6_RESIDENCY);
@@ -505,6 +510,10 @@ static void set_supported_events(struct xe_pmu *pmu) 
		pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_GT_REQUESTED_FREQUENCY);

	}



	/* Find the first available GT to query engine event capabilities */

	for_each_gt(gt, xe, id)

		break;



	if (xe_guc_engine_activity_supported(&gt->uc.guc)) {

		pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);

		pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_TOTAL_TICKS);