Commit 99e2f00c authored by Rob Herring (Arm)'s avatar Rob Herring (Arm) Committed by Lee Jones
Browse files

dt-bindings: mfd: Convert aspeed,ast2400-p2a-ctrl to DT schema 



Convert the aspeed,ast2x00-p2a-ctrl binding to DT schema format. The schema
is simple enough to just add it to the parent aspeed,ast2x00-scu binding.

Signed-off-by: default avatar"Rob Herring (Arm)" <robh@kernel.org>
Acked-by: default avatarAndrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250829230450.1496151-1-robh@kernel.org


Signed-off-by: default avatarLee Jones <lee@kernel.org>
parent 5872dccc

Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml

+32 −1
Original line number Diff line number Diff line
@@ -48,8 +48,34 @@ properties: 


patternProperties:

  '^p2a-control@[0-9a-f]+$':

    description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt

    description: >

      PCI-to-AHB Bridge Control



      The bridge is available on platforms with the VGA enabled on the Aspeed

      device. In this case, the host has access to a 64KiB window into all of

      the BMC's memory. The BMC can disable this bridge. If the bridge is

      enabled, the host has read access to all the regions of memory, however

      the host only has read and write access depending on a register

      controlled by the BMC.

    type: object

    additionalProperties: false



    properties:

      compatible:

        enum:

          - aspeed,ast2400-p2a-ctrl

          - aspeed,ast2500-p2a-ctrl

      reg:

        maxItems: 1



      memory-region:

        maxItems: 1

        description:

          A reserved_memory region to be used for the PCI to AHB mapping



    required:

      - compatible

      - reg



  '^pinctrl(@[0-9a-f]+)?$':

    type: object
@@ -123,6 +149,11 @@ examples: 
        #size-cells = <1>;

        ranges = <0x0 0x1e6e2000 0x1000>;



        p2a-control@2c {

            compatible = "aspeed,ast2400-p2a-ctrl";

            reg = <0x2c 0x4>;

        };



        silicon-id@7c {

            compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";

            reg = <0x7c 0x4>, <0x150 0x8>;

Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt

deleted100644 → 0
+0 −46
Original line number Diff line number Diff line 
======================================================================

Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver

======================================================================



The bridge is available on platforms with the VGA enabled on the Aspeed device.

In this case, the host has access to a 64KiB window into all of the BMC's

memory.  The BMC can disable this bridge.  If the bridge is enabled, the host

has read access to all the regions of memory, however the host only has read

and write access depending on a register controlled by the BMC.



Required properties:

===================



 - compatible: must be one of:

	- "aspeed,ast2400-p2a-ctrl"

	- "aspeed,ast2500-p2a-ctrl"



Optional properties:

===================



- reg: A hint for the memory regions associated with the P2A controller

- memory-region: A phandle to a reserved_memory region to be used for the PCI

		to AHB mapping



The p2a-control node should be the child of a syscon node with the required

property:



- compatible : Should be one of the following:

		"aspeed,ast2400-scu", "syscon", "simple-mfd"

		"aspeed,ast2500-scu", "syscon", "simple-mfd"



Example

===================



g4 Example

----------



syscon: scu@1e6e2000 {

	compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";

	reg = <0x1e6e2000 0x1a8>;



	p2a: p2a-control {

		compatible = "aspeed,ast2400-p2a-ctrl";

		memory-region = <&reserved_memory>;

	};

};