Commit 9a04d3b2 authored by Joris Vaisvila's avatar Joris Vaisvila Committed by Jakub Kicinski
Browse files

net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628 



The MT7628 has a fixed-link PHY and does not expose MAC control
registers. Writes to these registers only corrupt the ESW VLAN
configuration.

This patch explicitly registers no-op phylink_mac_ops for MT7628, as
after removing the invalid register accesses, the existing
phylink_mac_ops effectively become no-ops.

This code was introduced by commit 296c9120
("net: ethernet: mediatek: Add MT7628/88 SoC support")

Signed-off-by: default avatarJoris Vaisvila <joey@tinyisr.com>
Reviewed-by: default avatarDaniel Golle <daniel@makrotpia.org>
Reviewed-by: default avatarStefan Roese <stefan.roese@mailbox.org>
Link: https://patch.msgid.link/20260226154547.68553-1-joey@tinyisr.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent da89f2e3

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+30 −4
Original line number Diff line number Diff line
@@ -562,9 +562,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, 
	int val, ge_mode, err = 0;

	u32 i;



	/* MT76x8 has no hardware settings between for the MAC */

	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&

	    mac->interface != state->interface) {

	if (mac->interface != state->interface) {

		/* Setup soc pin functions */

		switch (state->interface) {

		case PHY_INTERFACE_MODE_TRGMII:
@@ -956,6 +954,30 @@ static const struct phylink_mac_ops mtk_phylink_ops = { 
	.mac_enable_tx_lpi = mtk_mac_enable_tx_lpi,

};



static void rt5350_mac_config(struct phylink_config *config, unsigned int mode,

				const struct phylink_link_state *state)

{

}



static void rt5350_mac_link_down(struct phylink_config *config, unsigned int mode,

				phy_interface_t interface)

{

}



static void rt5350_mac_link_up(struct phylink_config *config,

			    struct phy_device *phy,

			    unsigned int mode, phy_interface_t interface,

			    int speed, int duplex, bool tx_pause, bool rx_pause)

{

}



/* MT76x8 (rt5350-eth) does not expose any MAC control registers */

static const struct phylink_mac_ops rt5350_phylink_ops = {

	.mac_config = rt5350_mac_config,

	.mac_link_down = rt5350_mac_link_down,

	.mac_link_up = rt5350_mac_link_up,

};



static void mtk_mdio_config(struct mtk_eth *eth)

{

	u32 val;
@@ -4771,6 +4793,7 @@ static const struct net_device_ops mtk_netdev_ops = { 


static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)

{

	const struct phylink_mac_ops *mac_ops = &mtk_phylink_ops;

	const __be32 *_id = of_get_property(np, "reg", NULL);

	phy_interface_t phy_mode;

	struct phylink *phylink;
@@ -4905,9 +4928,12 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) 
			  mac->phylink_config.supported_interfaces);

	}



	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))

		mac_ops = &rt5350_phylink_ops;



	phylink = phylink_create(&mac->phylink_config,

				 of_fwnode_handle(mac->of_node),

				 phy_mode, &mtk_phylink_ops);

				 phy_mode, mac_ops);

	if (IS_ERR(phylink)) {

		err = PTR_ERR(phylink);

		goto free_netdev;