Commit 9a1cd7d6 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-fixes-2025-02-20' of https://gitlab.freedesktop.org/drm/msm into drm-fixes 



Fixes for v6.14-rc4

Display:
* More catalog fixes:
 - to skip watchdog programming through top block if its not present
 - fix the setting of WB mask to ensure the WB input control is programmed
   correctly through ping-pong
 - drop lm_pair for sm6150 as that chipset does not have any 3dmerge block
* Fix the mode validation logic for DP/eDP to account for widebus (2ppc)
  to allow high clock resolutions
* Fix to disable dither during encoder disable as otherwise this was
  causing kms_writeback failure due to resource sharing between
* WB and DSI paths as DSI uses dither but WB does not
* Fixes for virtual planes, namely to drop extraneous return and fix
  uninitialized variables
* Fix to avoid spill-over of DSC encoder block bits when programming
  the bits-per-component
* Fixes in the DSI PHY to protect against concurrent access of
  PHY_CMN_CLK_CFG regs between clock and display drivers

Core/GPU:
* Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout
* Only print GMU fw version once, instead of each time the GPU resumes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGtt2AODBXdod8ULXcAygf_qYvwRDVeUVtODx=2jErp6cA@mail.gmail.com
parents 930293b7 73f69c6b

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+4 −4
Original line number Diff line number Diff line
@@ -813,7 +813,7 @@ static int a6xx_gmu_fw_load(struct a6xx_gmu *gmu) 
	}



	ver = gmu_read(gmu, REG_A6XX_GMU_CORE_FW_VERSION);

	DRM_INFO("Loaded GMU firmware v%u.%u.%u\n",

	DRM_INFO_ONCE("Loaded GMU firmware v%u.%u.%u\n",

		      FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MAJOR__MASK, ver),

		      FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MINOR__MASK, ver),

		      FIELD_GET(A6XX_GMU_CORE_FW_VERSION_STEP__MASK, ver));

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

+1 −1
Original line number Diff line number Diff line
@@ -297,7 +297,7 @@ static const struct dpu_wb_cfg sm8150_wb[] = { 
	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SDM845_MASK,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats_rgb,

		.num_formats = ARRAY_SIZE(wb2_formats_rgb),

		.clk_ctrl = DPU_CLK_CTRL_WB2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

+1 −1
Original line number Diff line number Diff line
@@ -304,7 +304,7 @@ static const struct dpu_wb_cfg sc8180x_wb[] = { 
	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SDM845_MASK,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats_rgb,

		.num_formats = ARRAY_SIZE(wb2_formats_rgb),

		.clk_ctrl = DPU_CLK_CTRL_WB2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

+0 −2
Original line number Diff line number Diff line
@@ -116,14 +116,12 @@ static const struct dpu_lm_cfg sm6150_lm[] = { 
		.sblk = &sdm845_lm_sblk,

		.pingpong = PINGPONG_0,

		.dspp = DSPP_0,

		.lm_pair = LM_1,

	}, {

		.name = "lm_1", .id = LM_1,

		.base = 0x45000, .len = 0x320,

		.features = MIXER_QCM2290_MASK,

		.sblk = &sdm845_lm_sblk,

		.pingpong = PINGPONG_1,

		.lm_pair = LM_0,

	}, {

		.name = "lm_2", .id = LM_2,

		.base = 0x46000, .len = 0x320,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

+1 −1
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@ static const struct dpu_wb_cfg sm6125_wb[] = { 
	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SDM845_MASK,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats_rgb,

		.num_formats = ARRAY_SIZE(wb2_formats_rgb),

		.clk_ctrl = DPU_CLK_CTRL_WB2,