Commit 9a55c779 authored by Frank Min's avatar Frank Min Committed by Alex Deucher
Browse files

drm/amdgpu: fix getting vram info for gfx12 



gfx12 query video mem channel/type/width from umc_info of atom list, so
fix it accordingly.

Signed-off-by: default avatarFrank Min <Frank.Min@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b80160a5

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

+148 −115
Original line number Diff line number Diff line
@@ -289,7 +289,6 @@ static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev, 
	return vram_type;

}





int

amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,

				  int *vram_width, int *vram_type,
@@ -300,6 +299,7 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, 
	u16 data_offset, size;

	union igp_info *igp_info;

	union vram_info *vram_info;

	union umc_info *umc_info;

	union vram_module *vram_module;

	u8 frev, crev;

	u8 mem_type;
@@ -311,10 +311,16 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, 
	if (adev->flags & AMD_IS_APU)

		index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,

						    integratedsysteminfo);

	else

		index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,

						    vram_info);



	else {

		switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {

		case IP_VERSION(12, 0, 0):

		case IP_VERSION(12, 0, 1):

			index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, umc_info);

			break;

		default:

			index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, vram_info);

		}

	}

	if (amdgpu_atom_parse_data_header(mode_info->atom_context,

					  index, &size,

					  &frev, &crev, &data_offset)) {
@@ -368,8 +374,35 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, 
				return -EINVAL;

			}

		} else {

			switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {

			case IP_VERSION(12, 0, 0):

			case IP_VERSION(12, 0, 1):

				umc_info = (union umc_info *)(mode_info->atom_context->bios + data_offset);



				if (frev == 4) {

					switch (crev) {

					case 0:

						mem_channel_number = le32_to_cpu(umc_info->v40.channel_num);

						mem_type = le32_to_cpu(umc_info->v40.vram_type);

						mem_channel_width = le32_to_cpu(umc_info->v40.channel_width);

						mem_vendor = RREG32(adev->bios_scratch_reg_offset + 4) & 0xF;

						if (vram_vendor)

							*vram_vendor = mem_vendor;

						if (vram_type)

							*vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);

						if (vram_width)

							*vram_width = mem_channel_number * (1 << mem_channel_width);

						break;

					default:

						return -EINVAL;

					}

				} else

					return -EINVAL;

				break;

			default:

				vram_info = (union vram_info *)

					(mode_info->atom_context->bios + data_offset);



				module_id = (RREG32(adev->bios_scratch_reg_offset + 4) & 0x00ff0000) >> 16;

				if (frev == 3) {

					switch (crev) {
@@ -484,7 +517,7 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, 
					return -EINVAL;

				}

			}



		}

	}



	return 0;