Unverified Commit 9a68f6c8 authored by Miquel Raynal's avatar Miquel Raynal Committed by Mark Brown
Browse files

spi: zynq-qspi: Support per spi-mem operation frequency switches 



Every ->exec_op() call correctly configures the spi bus speed to the
maximum allowed frequency for the memory using the constant spi default
parameter. Since we can now have per-operation constraints, let's use
the value that comes from the spi-mem operation structure instead. In
case there is no specific limitation for this operation, the default spi
device value will be given anyway.

The per-operation frequency capability is thus advertised to the spi-mem
core.

Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-16-ad218dbc406f@bootlin.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b2fac319

drivers/spi/spi-zynq-qspi.c

+10 −3
Original line number Diff line number Diff line
@@ -318,6 +318,7 @@ static void zynq_qspi_chipselect(struct spi_device *spi, bool assert) 
 * zynq_qspi_config_op - Configure QSPI controller for specified transfer

 * @xqspi:	Pointer to the zynq_qspi structure

 * @spi:	Pointer to the spi_device structure

 * @op:		The memory operation to execute

 *

 * Sets the operational mode of QSPI controller for the next QSPI transfer and

 * sets the requested clock frequency.
@@ -331,7 +332,8 @@ static void zynq_qspi_chipselect(struct spi_device *spi, bool assert) 
 * controller the driver will set the highest or lowest frequency supported by

 * controller.

 */

static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi)

static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi,

			       const struct spi_mem_op *op)

{

	u32 config_reg, baud_rate_val = 0;
@@ -346,7 +348,7 @@ static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi) 
	 */

	while ((baud_rate_val < ZYNQ_QSPI_CONFIG_BAUD_DIV_MAX)  &&

	       (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) >

		spi->max_speed_hz)

		op->max_freq)

		baud_rate_val++;



	config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
@@ -534,7 +536,7 @@ static int zynq_qspi_exec_mem_op(struct spi_mem *mem, 
		op->dummy.buswidth, op->data.buswidth);



	zynq_qspi_chipselect(mem->spi, true);

	zynq_qspi_config_op(xqspi, mem->spi);

	zynq_qspi_config_op(xqspi, mem->spi, op);



	if (op->cmd.opcode) {

		reinit_completion(&xqspi->data_completion);
@@ -620,6 +622,10 @@ static const struct spi_controller_mem_ops zynq_qspi_mem_ops = { 
	.exec_op = zynq_qspi_exec_mem_op,

};



static const struct spi_controller_mem_caps zynq_qspi_mem_caps = {

	.per_op_freq = true,

};



/**

 * zynq_qspi_probe - Probe method for the QSPI driver

 * @pdev:	Pointer to the platform_device structure
@@ -706,6 +712,7 @@ static int zynq_qspi_probe(struct platform_device *pdev) 
	ctlr->mode_bits =  SPI_RX_DUAL | SPI_RX_QUAD |

			    SPI_TX_DUAL | SPI_TX_QUAD;

	ctlr->mem_ops = &zynq_qspi_mem_ops;

	ctlr->mem_caps = &zynq_qspi_mem_caps;

	ctlr->setup = zynq_qspi_setup_op;

	ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;

	ctlr->dev.of_node = np;