Commit 9b093f5b authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-x86-svm-6.15' of https://github.com/kvm-x86/linux into HEAD 

KVM SVM changes for 6.15

 - Ensure the PSP driver is initialized when both the PSP and KVM modules are
   built-in (the initcall framework doesn't handle dependencies).

 - Use long-term pins when registering encrypted memory regions, so that the
   pages are migrated out of MIGRATE_CMA/ZONE_MOVABLE and don't lead to
   excessive fragmentation.

 - Add macros and helpers for setting GHCB return/error codes.

 - Add support for Idle HLT interception, which elides interception if the vCPU
   has a pending, unmasked virtual IRQ when HLT is executed.

 - Fix a bug in INVPCID emulation where KVM fails to check for a non-canonical
   address.

 - Don't attempt VMRUN for SEV-ES+ guests if the vCPU's VMSA is invalid, e.g.
   because the vCPU was "destroyed" via SNP's AP Creation hypercall.

 - Reject SNP AP Creation if the requested SEV features for the vCPU don't
   match the VM's configured set of features.

 - Misc cleanups
parents a24dbf98 4e96f010

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -386,6 +386,7 @@ 
#define X86_FEATURE_V_SPEC_CTRL		(15*32+20) /* "v_spec_ctrl" Virtual SPEC_CTRL */

#define X86_FEATURE_VNMI		(15*32+25) /* "vnmi" Virtual NMI */

#define X86_FEATURE_SVME_ADDR_CHK	(15*32+28) /* SVME addr check */

#define X86_FEATURE_IDLE_HLT		(15*32+30) /* IDLE HLT intercept */



/* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */

#define X86_FEATURE_AVX512VBMI		(16*32+ 1) /* "avx512vbmi" AVX512 Vector Bit Manipulation instructions*/

arch/x86/include/asm/sev-common.h

+10 −2
Original line number Diff line number Diff line
@@ -212,8 +212,16 @@ struct snp_psc_desc { 
#define GHCB_RESP_CODE(v)		((v) & GHCB_MSR_INFO_MASK)



/*

 * Error codes related to GHCB input that can be communicated back to the guest

 * by setting the lower 32-bits of the GHCB SW_EXITINFO1 field to 2.

 * GHCB-defined return codes that are communicated back to the guest via

 * SW_EXITINFO1.

 */

#define GHCB_HV_RESP_NO_ACTION		0

#define GHCB_HV_RESP_ISSUE_EXCEPTION	1

#define GHCB_HV_RESP_MALFORMED_INPUT	2



/*

 * GHCB-defined sub-error codes for malformed input (see above) that are

 * communicated back to the guest via SW_EXITINFO2[31:0].

 */

#define GHCB_ERR_NOT_REGISTERED		1

#define GHCB_ERR_INVALID_USAGE		2

arch/x86/include/asm/svm.h

+1 −4
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ enum { 
	INTERCEPT_INVPCID,

	INTERCEPT_MCOMMIT,

	INTERCEPT_TLBSYNC,

	INTERCEPT_IDLE_HLT = 166,

};
@@ -290,10 +291,6 @@ static_assert((X2AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AVIC_ 
#define SVM_SEV_FEAT_ALTERNATE_INJECTION		BIT(4)

#define SVM_SEV_FEAT_DEBUG_SWAP				BIT(5)



#define SVM_SEV_FEAT_INT_INJ_MODES		\

	(SVM_SEV_FEAT_RESTRICTED_INJECTION |	\

	 SVM_SEV_FEAT_ALTERNATE_INJECTION)



struct vmcb_seg {

	u16 selector;

	u16 attrib;

arch/x86/include/uapi/asm/svm.h

+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ 
#define SVM_EXIT_CR14_WRITE_TRAP		0x09e

#define SVM_EXIT_CR15_WRITE_TRAP		0x09f

#define SVM_EXIT_INVPCID       0x0a2

#define SVM_EXIT_IDLE_HLT      0x0a6

#define SVM_EXIT_NPF           0x400

#define SVM_EXIT_AVIC_INCOMPLETE_IPI		0x401

#define SVM_EXIT_AVIC_UNACCELERATED_ACCESS	0x402
@@ -224,6 +225,7 @@ 
	{ SVM_EXIT_CR4_WRITE_TRAP,	"write_cr4_trap" }, \

	{ SVM_EXIT_CR8_WRITE_TRAP,	"write_cr8_trap" }, \

	{ SVM_EXIT_INVPCID,     "invpcid" }, \

	{ SVM_EXIT_IDLE_HLT,     "idle-halt" }, \

	{ SVM_EXIT_NPF,         "npf" }, \

	{ SVM_EXIT_AVIC_INCOMPLETE_IPI,		"avic_incomplete_ipi" }, \

	{ SVM_EXIT_AVIC_UNACCELERATED_ACCESS,   "avic_unaccelerated_access" }, \

arch/x86/kvm/svm/sev.c

+159 −209

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