Commit 9bae7a08 authored by Sean Christopherson's avatar Sean Christopherson
Browse files

KVM: x86/pmu: Move initialization of valid PMCs bitmask to common x86



Move all initialization of all_valid_pmc_idx to common code, as the logic
is 100% common to Intel and AMD, and KVM heavily relies on Intel and AMD
having the same semantics.  E.g. the fact that AMD doesn't support fixed
counters doesn't allow KVM to use all_valid_pmc_idx[63:32] for other
purposes.

Tested-by: default avatarXudong Hao <xudong.hao@intel.com>
Link: https://lore.kernel.org/r/20250806195706.1650976-31-seanjc@google.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 30c0267f
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+4 −0
Original line number Diff line number Diff line
@@ -888,6 +888,10 @@ void kvm_pmu_refresh(struct kvm_vcpu *vcpu)
	 */
	if (kvm_pmu_has_perf_global_ctrl(pmu) && pmu->nr_arch_gp_counters)
		pmu->global_ctrl = GENMASK_ULL(pmu->nr_arch_gp_counters - 1, 0);

	bitmap_set(pmu->all_valid_pmc_idx, 0, pmu->nr_arch_gp_counters);
	bitmap_set(pmu->all_valid_pmc_idx, KVM_FIXED_PMC_BASE_IDX,
		   pmu->nr_arch_fixed_counters);
}

void kvm_pmu_init(struct kvm_vcpu *vcpu)
+0 −1
Original line number Diff line number Diff line
@@ -210,7 +210,6 @@ static void amd_pmu_refresh(struct kvm_vcpu *vcpu)
	/* not applicable to AMD; but clean them to prevent any fall out */
	pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
	pmu->nr_arch_fixed_counters = 0;
	bitmap_set(pmu->all_valid_pmc_idx, 0, pmu->nr_arch_gp_counters);
}

static void amd_pmu_init(struct kvm_vcpu *vcpu)
+0 −5
Original line number Diff line number Diff line
@@ -579,11 +579,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
		pmu->raw_event_mask |= (HSW_IN_TX|HSW_IN_TX_CHECKPOINTED);
	}

	bitmap_set(pmu->all_valid_pmc_idx,
		0, pmu->nr_arch_gp_counters);
	bitmap_set(pmu->all_valid_pmc_idx,
		INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);

	perf_capabilities = vcpu_get_perf_capabilities(vcpu);
	if (intel_pmu_lbr_is_compatible(vcpu) &&
	    (perf_capabilities & PERF_CAP_LBR_FMT))