Commit 9bdcf2a5 authored by Yihan Zhu's avatar Yihan Zhu Committed by Alex Deucher
Browse files

drm/amd/display: w/a to program DISPCLK_R_GATE_DISABLE DCN35



[WHY & HOW]
Cursor corruption observed on USBC display with specific system setup with a
reboot. Cursor memory might still in the lightsleep state due to voltage
issue, we need program DISPCLK_R_GATE_DISABLE to avoid this issue only on
DCN35.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarYihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: default avatarWayne Lin <wayne.lin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9b47278c
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+1 −0
Original line number Diff line number Diff line
@@ -690,6 +690,7 @@ struct dcn20_dpp {
	int lb_memory_size;
	int lb_bits_per_entry;
	bool is_write_to_ram_a_safe;
	bool dispclk_r_gate_disable;
	struct scaler_data scl_data;
	struct pwl_params pwl_data;
};
+1 −0
Original line number Diff line number Diff line
@@ -572,6 +572,7 @@ struct dcn3_dpp {
	int lb_memory_size;
	int lb_bits_per_entry;
	bool is_write_to_ram_a_safe;
	bool dispclk_r_gate_disable;
	struct scaler_data scl_data;
	struct pwl_params pwl_data;
};
+18 −4
Original line number Diff line number Diff line
@@ -49,10 +49,20 @@ void dpp35_dppclk_control(
			REG_UPDATE_2(DPP_CONTROL,
				DPPCLK_RATE_CONTROL, dppclk_div,
				DPP_CLOCK_ENABLE, 1);
		else
			if (dpp->dispclk_r_gate_disable)
				REG_UPDATE_2(DPP_CONTROL,
					DPP_CLOCK_ENABLE, 1,
					DISPCLK_R_GATE_DISABLE, 1);
			else
				REG_UPDATE(DPP_CONTROL,
						DPP_CLOCK_ENABLE, 1);
	} else
		if (dpp->dispclk_r_gate_disable)
			REG_UPDATE_2(DPP_CONTROL,
				DPP_CLOCK_ENABLE, 0,
				DISPCLK_R_GATE_DISABLE, 0);
		else
			REG_UPDATE(DPP_CONTROL,
					DPP_CLOCK_ENABLE, 0);
}
@@ -126,6 +136,10 @@ bool dpp35_construct(
			      (const struct dcn3_dpp_mask *)(tf_mask));

	dpp->base.funcs = &dcn35_dpp_funcs;

	// w/a for cursor memory stuck in LS by programming DISPCLK_R_GATE_DISABLE, limit w/a to some ASIC revs
	if (dpp->base.ctx->asic_id.hw_internal_rev <= 0x10)
		dpp->dispclk_r_gate_disable = true;
	return ret;
}