Commit 9be5c479 authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Dmitry Baryshkov
Browse files

dt-bindings: display/msm: expand to support MST 



On a vast majority of Qualcomm chipsets DisplayPort controller can
support several MST streams (up to 4x). To support MST these chipsets
use up to 4 stream pixel clocks for the DisplayPort controller and
several extra register regions. Expand corresponding region and clock
bindings for these platforms and fix example schema files to follow
updated bindings.

Note: On chipsets that support MST, the number of streams supported
can vary between controllers. For example, SA8775P supports 4 MST
streams on mdss_dp0 but only 2 streams on mdss_dp1.

Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarJessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/672585/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-7-7526f0311eaa@oss.qualcomm.com
parent 0253f5ef

Documentation/devicetree/bindings/display/msm/dp-controller.yaml

+99 −4
Original line number Diff line number Diff line
@@ -66,25 +66,37 @@ properties: 
      - description: link register block

      - description: p0 register block

      - description: p1 register block

      - description: p2 register block

      - description: p3 register block

      - description: mst2link register block

      - description: mst3link register block



  interrupts:

    maxItems: 1



  clocks:

    minItems: 5

    items:

      - description: AHB clock to enable register access

      - description: Display Port AUX clock

      - description: Display Port Link clock

      - description: Link interface clock between DP and PHY

      - description: Display Port Pixel clock

      - description: Display Port stream 0 Pixel clock

      - description: Display Port stream 1 Pixel clock

      - description: Display Port stream 2 Pixel clock

      - description: Display Port stream 3 Pixel clock



  clock-names:

    minItems: 5

    items:

      - const: core_iface

      - const: core_aux

      - const: ctrl_link

      - const: ctrl_link_iface

      - const: stream_pixel

      - const: stream_1_pixel

      - const: stream_2_pixel

      - const: stream_3_pixel



  phys:

    maxItems: 1
@@ -166,7 +178,6 @@ required: 
allOf:

  # AUX BUS does not exist on DP controllers

  # Audio output also is present only on DP output

  # p1 regions is present on DP, but not on eDP

  - if:

      properties:

        compatible:
@@ -195,11 +206,95 @@ allOf: 
      else:

        properties:

          aux-bus: false

          reg:

            minItems: 5

        required:

          - "#sound-dai-cells"



  - if:

      properties:

        compatible:

          contains:

            enum:

              # these platforms support SST only

              - qcom,sc7180-dp

              - qcom,sc7280-dp

              - qcom,sc7280-edp

              - qcom,sc8180x-edp

              - qcom,sc8280xp-edp

    then:

      properties:

        reg:

          minItems: 5

          maxItems: 5

        clocks:

          minItems: 5

          maxItems: 5

        clocks-names:

          minItems: 5

          maxItems: 5



  - if:

      properties:

        compatible:

          contains:

            enum:

              # these platforms support 2 streams MST on some interfaces,

              # others are SST only

              - qcom,sc8280xp-dp

              - qcom,x1e80100-dp

    then:

      properties:

        reg:

          minItems: 5

          maxItems: 5

        clocks:

          minItems: 5

          maxItems: 6

        clocks-names:

          minItems: 5

          maxItems: 6



  - if:

      properties:

        compatible:

          contains:

            # 2 streams MST

            enum:

              - qcom,sc8180x-dp

              - qcom,sdm845-dp

              - qcom,sm8350-dp

              - qcom,sm8650-dp

    then:

      properties:

        reg:

          minItems: 5

          maxItems: 5

        clocks:

          minItems: 6

          maxItems: 6

        clocks-names:

          minItems: 6

          maxItems: 6



  - if:

      properties:

        compatible:

          contains:

            enum:

              # these platforms support 4 stream MST on first DP,

              # 2 streams MST on the second one.

              - qcom,sa8775p-dp

    then:

      properties:

        reg:

          minItems: 9

          maxItems: 9

        clocks:

          minItems: 6

          maxItems: 8

        clocks-names:

          minItems: 6

          maxItems: 8



additionalProperties: false



examples:

Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml

+21 −5
Original line number Diff line number Diff line
@@ -375,7 +375,11 @@ examples: 
                  <0xaf54200 0x0c0>,

                  <0xaf55000 0x770>,

                  <0xaf56000 0x09c>,

                  <0xaf57000 0x09c>;

                  <0xaf57000 0x09c>,

                  <0xaf58000 0x09c>,

                  <0xaf59000 0x09c>,

                  <0xaf5a000 0x23c>,

                  <0xaf5b000 0x23c>;



            interrupt-parent = <&mdss0>;

            interrupts = <12>;
@@ -384,16 +388,28 @@ examples: 
                     <&dispcc_dptx0_aux_clk>,

                     <&dispcc_dptx0_link_clk>,

                     <&dispcc_dptx0_link_intf_clk>,

                     <&dispcc_dptx0_pixel0_clk>;

                     <&dispcc_dptx0_pixel0_clk>,

                     <&dispcc_dptx0_pixel1_clk>,

                     <&dispcc_dptx0_pixel2_clk>,

                     <&dispcc_dptx0_pixel3_clk>;

            clock-names = "core_iface",

                          "core_aux",

                          "ctrl_link",

                          "ctrl_link_iface",

                          "stream_pixel";

                          "stream_pixel",

                          "stream_1_pixel",

                          "stream_2_pixel",

                          "stream_3_pixel";



            assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>,

                              <&dispcc_mdss_dptx0_pixel0_clk_src>;

            assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;

                              <&dispcc_mdss_dptx0_pixel0_clk_src>,

                              <&dispcc_mdss_dptx0_pixel1_clk_src>,

                              <&dispcc_mdss_dptx0_pixel2_clk_src>,

                              <&dispcc_mdss_dptx0_pixel3_clk_src>;

            assigned-clock-parents = <&mdss0_dp0_phy 0>,

                                     <&mdss0_dp0_phy 1>,

                                     <&mdss0_dp0_phy 1>,

                                     <&mdss0_dp0_phy 1>;



            phys = <&mdss0_dp0_phy>;

            phy-names = "dp";

Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml

+7 −3
Original line number Diff line number Diff line
@@ -207,16 +207,20 @@ examples: 
                     <&dispcc_disp_cc_mdss_dptx0_aux_clk>,

                     <&dispcc_disp_cc_mdss_dptx0_link_clk>,

                     <&dispcc_disp_cc_mdss_dptx0_link_intf_clk>,

                     <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>;

                     <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>,

                     <&dispcc_disp_cc_mdss_dptx0_pixel1_clk>;

            clock-names = "core_iface",

                          "core_aux",

                          "ctrl_link",

                          "ctrl_link_iface",

                          "stream_pixel";

                          "stream_pixel",

                          "stream_1_pixel";



            assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>,

                              <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>;

                              <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>,

                              <&dispcc_disp_cc_mdss_dptx0_pixel1_clk_src>;

            assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>,

                                     <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>,

                                     <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>;



            phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;

Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml

+2 −1
Original line number Diff line number Diff line
@@ -281,7 +281,8 @@ examples: 
            reg = <0xaea0000 0x200>,

                  <0xaea0200 0x200>,

                  <0xaea0400 0xc00>,

                  <0xaea1000 0x400>;

                  <0xaea1000 0x400>,

                  <0xaea1400 0x400>;



            interrupt-parent = <&mdss>;

            interrupts = <14>;

Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml

+7 −3
Original line number Diff line number Diff line
@@ -394,16 +394,20 @@ examples: 
                     <&dispcc_mdss_dp_aux_clk>,

                     <&dispcc_mdss_dp_link_clk>,

                     <&dispcc_mdss_dp_link_intf_clk>,

                     <&dispcc_mdss_dp_pixel_clk>;

                     <&dispcc_mdss_dp_pixel_clk>,

                     <&dispcc_mdss_dp_pixel1_clk>;

            clock-names = "core_iface",

                          "core_aux",

                          "ctrl_link",

                          "ctrl_link_iface",

                          "stream_pixel";

                          "stream_pixel",

                          "stream_1_pixel";



            assigned-clocks = <&dispcc_mdss_dp_link_clk_src>,

                              <&dispcc_mdss_dp_pixel_clk_src>;

                              <&dispcc_mdss_dp_pixel_clk_src>,

                              <&dispcc_mdss_dp_pixel1_clk_src>;

            assigned-clock-parents = <&dp_phy 0>,

                                     <&dp_phy 1>,

                                     <&dp_phy 1>;



            operating-points-v2 = <&dp_opp_table>;