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drm/msm/mdp4: register the LVDS PLL as a clock provider
The LVDS/LCDC controller uses pixel clock coming from the multimedia controller (mmcc) rather than using the PLL directly. Stop using LVDS PLL directly and register it as a clock provider. Use lcdc_clk as a pixel clock for the LCDC. Reviewed-by:Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/650280/ Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-3-6b212160b44c@oss.qualcomm.com Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>