Commit 9c5a5440 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

Merge tag 'tegra-for-7.1-arm-dt' of... 

Merge tag 'tegra-for-7.1-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v7.1-rc1

Various improvements for Tegra114 boards, as well as some legacy cleanup
for PAZ00 and Transformers devices.

* tag 'tegra-for-7.1-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  ARM: tegra: paz00: Configure WiFi rfkill switch through device tree
  ARM: tegra: transformers: Add connector node
  ARM: tegra: Add External Memory Controller node on Tegra114
  ARM: tegra: Add ACTMON node to Tegra114 device tree
  ARM: tegra: lg-x3: Add node for capacitive buttons
  ARM: tegra: lg-x3: Add USB and power related nodes
  ARM: tegra: lg-x3: Add panel and bridge nodes
  ARM: tn7: Adjust panel node
  ARM: tegra: Add SOCTHERM support on Tegra114

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parents 8366b60c ce74a6c6

arch/arm/boot/dts/nvidia/tegra114-tn7.dts

+7 −6
Original line number Diff line number Diff line
@@ -43,7 +43,9 @@ panel@0 { 
				compatible = "lg,ld070wx3-sl01";

				reg = <0>;



				power-supply = <&vdd_lcd>;

				vdd-supply = <&avdd_lcd>;

				vcc-supply = <&dvdd_lcd>;



				backlight = <&backlight>;

			};

		};
@@ -101,11 +103,10 @@ smps45 { 
						regulator-boot-on;

					};



					smps6 {

					avdd_lcd: smps6 {

						regulator-name = "va-lcd-hv";

						regulator-min-microvolt = <3000000>;

						regulator-max-microvolt = <3000000>;

						regulator-always-on;

						regulator-min-microvolt = <3160000>;

						regulator-max-microvolt = <3160000>;

						regulator-boot-on;

					};
@@ -325,7 +326,7 @@ lcd_bl_en: regulator-lcden { 
		regulator-boot-on;

	};



	vdd_lcd: regulator-lcd {

	dvdd_lcd: regulator-lcd {

		compatible = "regulator-fixed";

		regulator-name = "VD_LCD_1V8";

		regulator-min-microvolt = <1800000>;

arch/arm/boot/dts/nvidia/tegra114.dtsi

+221 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/reset/nvidia,tegra114-car.h>

#include <dt-bindings/soc/tegra-pmc.h>

#include <dt-bindings/thermal/tegra114-soctherm.h>



/ {

	compatible = "nvidia,tegra114";
@@ -258,6 +259,8 @@ tegra_car: clock@60006000 { 
		reg = <0x60006000 0x1000>;

		#clock-cells = <1>;

		#reset-cells = <1>;



		nvidia,external-memory-controller = <&emc>;

	};



	flow-controller@60007000 {
@@ -311,6 +314,18 @@ ahb: ahb@6000c000 { 
		reg = <0x6000c000 0x150>;

	};



	actmon: actmon@6000c800 {

		compatible = "nvidia,tegra114-actmon";

		reg = <0x6000c800 0x400>;

		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA114_CLK_ACTMON>,

			 <&tegra_car TEGRA114_CLK_EMC>;

		clock-names = "actmon", "emc";

		resets = <&tegra_car TEGRA114_CLK_ACTMON>;

		reset-names = "actmon";

		#cooling-cells = <2>;

	};



	gpio: gpio@6000d000 {

		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";

		reg = <0x6000d000 0x1000>;
@@ -642,6 +657,16 @@ mc: memory-controller@70019000 { 
		#iommu-cells = <1>;

	};



	emc: external-memory-controller@7001b000 {

		compatible = "nvidia,tegra114-emc";

		reg = <0x7001b000 0x800>;

		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA114_CLK_EMC>;

		clock-names = "emc";



		nvidia,memory-controller = <&mc>;

	};



	hda@70030000 {

		compatible = "nvidia,tegra114-hda", "nvidia,tegra30-hda";

		reg = <0x70030000 0x10000>;
@@ -751,6 +776,46 @@ tegra_i2s4: i2s@70080700 { 
		};

	};



	soctherm: thermal-sensor@700e2000 {

		compatible = "nvidia,tegra114-soctherm";

		reg = <0x700e2000 0x600>, /* SOC_THERM reg_base */

		      <0x60006000 0x400>; /* CAR reg_base */

		reg-names = "soctherm-reg", "car-reg";

		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "thermal", "edp";

		clocks = <&tegra_car TEGRA114_CLK_TSENSOR>,

			 <&tegra_car TEGRA114_CLK_SOC_THERM>;

		clock-names = "tsensor", "soctherm";

		resets = <&tegra_car 78>;

		reset-names = "soctherm";



		assigned-clocks = <&tegra_car TEGRA114_CLK_TSENSOR>,

				  <&tegra_car TEGRA114_CLK_SOC_THERM>;

		assigned-clock-rates = <500000>, <51000000>;



		assigned-clock-parents = <&tegra_car TEGRA114_CLK_CLK_M>,

					 <&tegra_car TEGRA114_CLK_PLL_P>;



		#thermal-sensor-cells = <1>;



		throttle-cfgs {

			throttle_heavy: heavy {

				nvidia,priority = <100>;

				nvidia,cpu-throt-percent = <80>;

				nvidia,gpu-throt-level = <TEGRA114_SOCTHERM_THROT_LEVEL_HIGH>;

				#cooling-cells = <2>;

			};



			throttle_light: light {

				nvidia,priority = <80>;

				nvidia,cpu-throt-percent = <50>;

				nvidia,gpu-throt-level = <TEGRA114_SOCTHERM_THROT_LEVEL_MED>;

				#cooling-cells = <2>;

			};

		};

	};



	mipi: mipi@700e3000 {

		compatible = "nvidia,tegra114-mipi";

		reg = <0x700e3000 0x100>;
@@ -921,24 +986,28 @@ cpu0: cpu@0 { 
			clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";

			/* FIXME: what's the actual transition time? */

			clock-latency = <300000>;

			#cooling-cells = <2>;

		};



		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a15";

			reg = <1>;

			#cooling-cells = <2>;

		};



		cpu2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a15";

			reg = <2>;

			#cooling-cells = <2>;

		};



		cpu3: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a15";

			reg = <3>;

			#cooling-cells = <2>;

		};

	};
@@ -951,6 +1020,158 @@ pmu { 
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;

	};



	thermal-zones {

		cpu-thermal {

			polling-delay-passive = <1000>;

			polling-delay = <1000>;



			thermal-sensors =

				<&soctherm TEGRA114_SOCTHERM_SENSOR_CPU>;



			trips {

				cpu-shutdown-trip {

					temperature = <102000>;

					hysteresis = <0>;

					type = "critical";

				};



				cpu_throttle_trip: cpu-throttle-trip {

					temperature = <100000>;

					hysteresis = <1000>;

					type = "hot";

				};



				cpu_balanced_trip: cpu-balanced-trip {

					temperature = <90000>;

					hysteresis = <1000>;

					type = "passive";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_throttle_trip>;

					cooling-device = <&throttle_heavy 1 1>;

				};



				map1 {

					trip = <&cpu_balanced_trip>;

					cooling-device = <&throttle_light 1 1>;

				};

			};

		};



		mem-thermal {

			polling-delay-passive = <1000>;

			polling-delay = <1000>;



			thermal-sensors =

				<&soctherm TEGRA114_SOCTHERM_SENSOR_MEM>;



			trips {

				mem-shutdown-trip {

					temperature = <102000>;

					hysteresis = <0>;

					type = "critical";

				};



				mem_throttle_trip: mem-throttle-trip {

					temperature = <100000>;

					hysteresis = <1000>;

					type = "hot";

				};



				mem_balanced_trip: mem-balanced-trip {

					temperature = <90000>;

					hysteresis = <1000>;

					type = "passive";

				};

			};



			cooling-maps {

				/*

				 * There are currently no cooling maps,

				 * because there are no cooling devices.

				 */

			};

		};



		gpu-thermal {

			polling-delay-passive = <1000>;

			polling-delay = <1000>;



			thermal-sensors =

				<&soctherm TEGRA114_SOCTHERM_SENSOR_GPU>;



			trips {

				gpu-shutdown-trip {

					temperature = <102000>;

					hysteresis = <0>;

					type = "critical";

				};



				gpu_throttle_trip: gpu-throttle-trip {

					temperature = <100000>;

					hysteresis = <1000>;

					type = "hot";

				};



				gpu_balanced_trip: gpu-balanced-trip {

					temperature = <90000>;

					hysteresis = <1000>;

					type = "passive";

				};

			};



			cooling-maps {

				map0 {

					trip = <&gpu_throttle_trip>;

					cooling-device = <&throttle_heavy 1 1>;

				};



				map1 {

					trip = <&gpu_balanced_trip>;

					cooling-device = <&throttle_light 1 1>;

				};

			};

		};



		pllx-thermal {

			polling-delay-passive = <1000>;

			polling-delay = <1000>;



			thermal-sensors =

				<&soctherm TEGRA114_SOCTHERM_SENSOR_PLLX>;



			trips {

				pllx-shutdown-trip {

					temperature = <102000>;

					hysteresis = <0>;

					type = "critical";

				};



				pllx_throttle_trip: pllx-throttle-trip {

					temperature = <100000>;

					hysteresis = <1000>;

					type = "hot";

				};



				pllx_balanced_trip: pllx-balanced-trip {

					temperature = <90000>;

					hysteresis = <1000>;

					type = "passive";

				};

			};



			cooling-maps {

				/*

				 * There are currently no cooling maps,

				 * because there are no cooling devices.

				 */

			};

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts =

arch/arm/boot/dts/nvidia/tegra20-paz00.dts

+8 −0
Original line number Diff line number Diff line
@@ -706,6 +706,14 @@ vdd_pnl_reg: regulator-3v0 { 
		enable-active-high;

	};



	rfkill {

		compatible = "rfkill-gpio";

		label = "wifi_rfkill";

		radio-type = "wlan";

		reset-gpios = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;

		shutdown-gpios = <&gpio TEGRA_GPIO(K, 5) GPIO_ACTIVE_HIGH>;

	};



	sound {

		compatible = "nvidia,tegra-audio-alc5632-paz00",

			"nvidia,tegra-audio-alc5632";

arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts

+19 −2
Original line number Diff line number Diff line
@@ -62,8 +62,11 @@ hdmi: hdmi@54280000 { 
			pll-supply = <&vdd_1v8_vio>;

			vdd-supply = <&vdd_3v3_sys>;



			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;

			port {

				hdmi_out: endpoint {

					remote-endpoint = <&hdmi_connector_in>;

				};

			};

		};

	};
@@ -2174,6 +2177,20 @@ clk32k_in: clock-32k { 
		clock-output-names = "pmic-oscillator";

	};



	hdmi-connector {

		compatible = "hdmi-connector";

		type = "d";



		hpd-gpios = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;

		ddc-i2c-bus = <&hdmi_ddc>;



		port {

			hdmi_connector_in: endpoint {

				remote-endpoint = <&hdmi_out>;

			};

		};

	};



	cpus {

		cpu0: cpu@0 {

			cpu-supply = <&vdd_cpu>;

arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts

+23 −0
Original line number Diff line number Diff line
@@ -116,6 +116,29 @@ rmi4-f11@11 { 
		};

	};



	spi@7000dc00 {

		dsi@2 {

			/*

			 * JDI 4.57" 720x1280 DX12D100VM0EAA MIPI DSI panel

			 */

			panel@1 {

				compatible = "jdi,dx12d100vm0eaa", "renesas,r69328";

				reg = <1>;



				reset-gpios = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_LOW>;



				vdd-supply = <&vcc_3v0_lcd>;

				vddio-supply = <&iovcc_1v8_lcd>;



				port {

					panel_input: endpoint {

						remote-endpoint = <&bridge_output>;

					};

				};

			};

		};

	};



	memory-controller@7000f000 {

		emc-timings-0 {

			/* SAMSUNG 1GB K4P8G304EB FGC1 533MHz */