Commit 9c5ad7bf authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'make-phy-output-rmii-reference-clock' 

Wei Fang says:

====================
make PHY output RMII reference clock

The TJA11xx PHYs have the capability to provide 50MHz reference clock
in RMII mode and output on REF_CLK pin. Therefore, add the new property
"nxp,rmii-refclk-output" to support this feature. This property is only
available for PHYs which use nxp-c45-tja11xx driver, such as TJA1103,
TJA1104, TJA1120 and TJA1121.
====================

Link: https://patch.msgid.link/20241010061944.266966-1-wei.fang@nxp.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents 60b4d49b 6d8d8987

Documentation/devicetree/bindings/net/nxp,tja11xx.yaml

+16 −0
Original line number Diff line number Diff line
@@ -62,6 +62,22 @@ allOf: 
            reference clock output when RMII mode enabled.

            Only supported on TJA1100 and TJA1101.



  - if:

      properties:

        compatible:

          contains:

            enum:

              - ethernet-phy-id001b.b010

              - ethernet-phy-id001b.b013

              - ethernet-phy-id001b.b030

              - ethernet-phy-id001b.b031



    then:

      properties:

        nxp,rmii-refclk-out:

          type: boolean

          description: Enable 50MHz RMII reference clock output on REF_CLK pin.



patternProperties:

  "^ethernet-phy@[0-9a-f]+$":

    type: object

drivers/net/phy/nxp-c45-tja11xx.c

+29 −1
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/kernel.h>

#include <linux/mii.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/phy.h>

#include <linux/processor.h>

#include <linux/property.h>
@@ -185,6 +186,8 @@ 


#define NXP_C45_SKB_CB(skb)	((struct nxp_c45_skb_cb *)(skb)->cb)



#define TJA11XX_REVERSE_MODE		BIT(0)



struct nxp_c45_phy;



struct nxp_c45_skb_cb {
@@ -1510,6 +1513,8 @@ static int nxp_c45_get_delays(struct phy_device *phydev) 


static int nxp_c45_set_phy_mode(struct phy_device *phydev)

{

	struct nxp_c45_phy *priv = phydev->priv;

	u16 basic_config;

	int ret;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_ABILITIES);
@@ -1561,8 +1566,15 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev) 
			phydev_err(phydev, "rmii mode not supported\n");

			return -EINVAL;

		}



		basic_config = MII_BASIC_CONFIG_RMII;



		/* This is not PHY_INTERFACE_MODE_REVRMII */

		if (priv->flags & TJA11XX_REVERSE_MODE)

			basic_config |= MII_BASIC_CONFIG_REV;



		phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_MII_BASIC_CONFIG,

			      MII_BASIC_CONFIG_RMII);

			      basic_config);

		break;

	case PHY_INTERFACE_MODE_SGMII:

		if (!(ret & SGMII_ABILITY)) {
@@ -1623,6 +1635,20 @@ static int nxp_c45_get_features(struct phy_device *phydev) 
	return genphy_c45_pma_read_abilities(phydev);

}



static int nxp_c45_parse_dt(struct phy_device *phydev)

{

	struct device_node *node = phydev->mdio.dev.of_node;

	struct nxp_c45_phy *priv = phydev->priv;



	if (!IS_ENABLED(CONFIG_OF_MDIO))

		return 0;



	if (of_property_read_bool(node, "nxp,rmii-refclk-out"))

		priv->flags |= TJA11XX_REVERSE_MODE;



	return 0;

}



static int nxp_c45_probe(struct phy_device *phydev)

{

	struct nxp_c45_phy *priv;
@@ -1642,6 +1668,8 @@ static int nxp_c45_probe(struct phy_device *phydev) 


	phydev->priv = priv;



	nxp_c45_parse_dt(phydev);



	mutex_init(&priv->ptp_lock);



	phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,

drivers/net/phy/nxp-c45-tja11xx.h

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ struct nxp_c45_phy { 
	int extts_index;

	bool extts;

	struct nxp_c45_macsec *macsec;

	u32 flags;

};



#if IS_ENABLED(CONFIG_MACSEC)