Commit 9c5ef7a3 authored by Leo Yan's avatar Leo Yan Committed by Suzuki K Poulose
Browse files

coresight: cti: Properly handle negative offsets in cti_reg32_{show|store}() 



Return an error when the offset is negative.

Signed-off-by: default avatarLeo Yan <leo.yan@arm.com>
Reviewed-by: default avatarMike Leach <mike.leach@Arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20260226-arm_coresight_cti_refactor_v1-v2-8-b30fada3cfec@arm.com
parent d5e57bab

drivers/hwtracing/coresight/coresight-cti-sysfs.c

+8 −2
Original line number Diff line number Diff line
@@ -252,8 +252,11 @@ static ssize_t cti_reg32_show(struct device *dev, char *buf, 
	struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);

	struct cti_config *config = &drvdata->config;



	if (reg_offset < 0)

		return -EINVAL;



	scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {

		if ((reg_offset >= 0) && cti_is_active(config)) {

		if (cti_is_active(config)) {

			val = cti_read_single_reg(drvdata, reg_offset);

			if (pcached_val)

				*pcached_val = val;
@@ -280,13 +283,16 @@ static ssize_t cti_reg32_store(struct device *dev, const char *buf, 
	if (kstrtoul(buf, 0, &val))

		return -EINVAL;



	if (reg_offset < 0)

		return -EINVAL;



	scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {

		/* local store */

		if (pcached_val)

			*pcached_val = (u32)val;



		/* write through if offset and enabled */

		if ((reg_offset >= 0) && cti_is_active(config))

		if (cti_is_active(config))

			cti_write_single_reg(drvdata, reg_offset, val);

	}