Commit 9c68a3b0 authored by Gautham R. Shenoy's avatar Gautham R. Shenoy Committed by Mario Limonciello
Browse files

cpufreq/amd-pstate: Remove warning for X86_FEATURE_CPPC on certain Zen models 



commit bff7d13c ("cpufreq: amd-pstate: add debug message while
CPPC is supported and disabled by SBIOS") issues a warning on plaforms
where the X86_FEATURE_CPPC is expected to be enabled, but is not due
to it being disabled in the BIOS.

This feature bit corresponds to CPUID 0x80000008.ebx[27] which is a
reserved bit on the Zen1 processors and a reserved bit on Zen2 based
models 0x70-0x7F, and is expected to be cleared on these
platforms. Thus printing the warning message for these models when
X86_FEATURE_CPPC is unavailable is incorrect. Fix this.

Modify some of the comments, and use switch-case for model range
checking for improved readability while at it.

Fixes: bff7d13c ("cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS")
Cc: Xiaojian Du <xiaojian.du@amd.com>
Reported-by: default avatarDavid Wang <00107082@163.com>
Closes: https://lore.kernel.org/lkml/20240730140111.4491-1-00107082@163.com/


Signed-off-by: default avatarGautham R. Shenoy <gautham.shenoy@amd.com>
Acked-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
parent 9983a9cd

drivers/cpufreq/amd-pstate.c

+24 −10
Original line number Diff line number Diff line
@@ -1834,20 +1834,34 @@ static bool amd_cppc_supported(void) 
	}



	/*

	 * If the CPPC feature is disabled in the BIOS for processors that support MSR-based CPPC,

	 * the AMD Pstate driver may not function correctly.

	 * Check the CPPC flag and display a warning message if the platform supports CPPC.

	 * Note: below checking code will not abort the driver registeration process because of

	 * the code is added for debugging purposes.

	 * If the CPPC feature is disabled in the BIOS for processors

	 * that support MSR-based CPPC, the AMD Pstate driver may not

	 * function correctly.

	 *

	 * For such processors, check the CPPC flag and display a

	 * warning message if the platform supports CPPC.

	 *

	 * Note: The code check below will not abort the driver

	 * registration process because of the code is added for

	 * debugging purposes. Besides, it may still be possible for

	 * the driver to work using the shared-memory mechanism.

	 */

	if (!cpu_feature_enabled(X86_FEATURE_CPPC)) {

		if (cpu_feature_enabled(X86_FEATURE_ZEN1) || cpu_feature_enabled(X86_FEATURE_ZEN2)) {

			if (c->x86_model > 0x60 && c->x86_model < 0xaf)

		if (cpu_feature_enabled(X86_FEATURE_ZEN2)) {

			switch (c->x86_model) {

			case 0x60 ... 0x6F:

			case 0x80 ... 0xAF:

				warn = true;

		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) || cpu_feature_enabled(X86_FEATURE_ZEN4)) {

			if ((c->x86_model > 0x10 && c->x86_model < 0x1F) ||

					(c->x86_model > 0x40 && c->x86_model < 0xaf))

				break;

			}

		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) ||

			   cpu_feature_enabled(X86_FEATURE_ZEN4)) {

			switch (c->x86_model) {

			case 0x10 ... 0x1F:

			case 0x40 ... 0xAF:

				warn = true;

				break;

			}

		} else if (cpu_feature_enabled(X86_FEATURE_ZEN5)) {

			warn = true;

		}