Commit 9ce015e5 authored by Gangliang Xie's avatar Gangliang Xie Committed by Alex Deucher
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drm/amdgpu: adapt reset function for pmfw eeprom



adapt reset function for pmfw eeprom

Signed-off-by: default avatarGangliang Xie <ganglxie@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f903b85e
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+36 −25
Original line number Diff line number Diff line
@@ -444,11 +444,13 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
	struct amdgpu_ras_eeprom_table_ras_info *rai = &control->tbl_rai;
	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
	u32 erase_res = 0;
	u8 csum;
	int res;

	mutex_lock(&control->ras_tbl_mutex);

	if (!amdgpu_ras_smu_eeprom_supported(adev)) {
		hdr->header = RAS_TABLE_HDR_VAL;
		amdgpu_ras_set_eeprom_table_version(control);

@@ -477,6 +479,15 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
		res = __write_table_header(control);
		if (!res && hdr->version > RAS_TABLE_VER_V1)
			res = __write_table_ras_info(control);
	} else {
		res = amdgpu_ras_smu_erase_ras_table(adev, &erase_res);
		if (res || erase_res) {
			dev_warn(adev->dev, "RAS EEPROM reset failed, res:%d result:%d",
										res, erase_res);
			if (!res)
				res = -EIO;
		}
	}

	control->ras_num_recs = 0;
	control->ras_num_bad_pages = 0;