Commit 9cf6f05c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Combine .compute_{pipe,intermediate}_wm() into one 



We always call .compute_pipe_wm() and .compute_intermediate_wm()
back to back. Just combine them to a single hook for simplicity.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
parent f86d45ac

drivers/gpu/drm/i915/display/i9xx_wm.c

+51 −6
Original line number Diff line number Diff line
@@ -1289,6 +1289,22 @@ static int g4x_compute_intermediate_wm(struct intel_atomic_state *state, 
	return 0;

}



static int g4x_compute_watermarks(struct intel_atomic_state *state,

				  struct intel_crtc *crtc)

{

	int ret;



	ret = g4x_compute_pipe_wm(state, crtc);

	if (ret)

		return ret;



	ret = g4x_compute_intermediate_wm(state, crtc);

	if (ret)

		return ret;



	return 0;

}



static void g4x_merge_wm(struct drm_i915_private *dev_priv,

			 struct g4x_wm_values *wm)

{
@@ -1915,6 +1931,22 @@ static int vlv_compute_intermediate_wm(struct intel_atomic_state *state, 
	return 0;

}



static int vlv_compute_watermarks(struct intel_atomic_state *state,

				  struct intel_crtc *crtc)

{

	int ret;



	ret = vlv_compute_pipe_wm(state, crtc);

	if (ret)

		return ret;



	ret = vlv_compute_intermediate_wm(state, crtc);

	if (ret)

		return ret;



	return 0;

}



static void vlv_merge_wm(struct drm_i915_private *dev_priv,

			 struct vlv_wm_values *wm)

{
@@ -2941,6 +2973,22 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state, 
	return 0;

}



static int ilk_compute_watermarks(struct intel_atomic_state *state,

				  struct intel_crtc *crtc)

{

	int ret;



	ret = ilk_compute_pipe_wm(state, crtc);

	if (ret)

		return ret;



	ret = ilk_compute_intermediate_wm(state, crtc);

	if (ret)

		return ret;



	return 0;

}



/*

 * Merge the watermarks from all active pipes for a specific level.

 */
@@ -3987,16 +4035,14 @@ static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv) 
}



static const struct intel_wm_funcs ilk_wm_funcs = {

	.compute_pipe_wm = ilk_compute_pipe_wm,

	.compute_intermediate_wm = ilk_compute_intermediate_wm,

	.compute_watermarks = ilk_compute_watermarks,

	.initial_watermarks = ilk_initial_watermarks,

	.optimize_watermarks = ilk_optimize_watermarks,

	.get_hw_state = ilk_wm_get_hw_state,

};



static const struct intel_wm_funcs vlv_wm_funcs = {

	.compute_pipe_wm = vlv_compute_pipe_wm,

	.compute_intermediate_wm = vlv_compute_intermediate_wm,

	.compute_watermarks = vlv_compute_watermarks,

	.initial_watermarks = vlv_initial_watermarks,

	.optimize_watermarks = vlv_optimize_watermarks,

	.atomic_update_watermarks = vlv_atomic_update_fifo,
@@ -4004,8 +4050,7 @@ static const struct intel_wm_funcs vlv_wm_funcs = { 
};



static const struct intel_wm_funcs g4x_wm_funcs = {

	.compute_pipe_wm = g4x_compute_pipe_wm,

	.compute_intermediate_wm = g4x_compute_intermediate_wm,

	.compute_watermarks = g4x_compute_watermarks,

	.initial_watermarks = g4x_initial_watermarks,

	.optimize_watermarks = g4x_optimize_watermarks,

	.get_hw_state = g4x_wm_get_hw_state_and_sanitize,

drivers/gpu/drm/i915/display/intel_display.c

+3 −14
Original line number Diff line number Diff line
@@ -4334,22 +4334,11 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, 
	if (ret)

		return ret;



	ret = intel_compute_pipe_wm(state, crtc);

	ret = intel_wm_compute(state, crtc);

	if (ret) {

		drm_dbg_kms(&dev_priv->drm,

			    "Target pipe watermarks are invalid\n");

		return ret;

	}



	/*

	 * Calculate 'intermediate' watermarks that satisfy both the

	 * old state and the new state.  We can program these

	 * immediately.

	 */

	ret = intel_compute_intermediate_wm(state, crtc);

	if (ret) {

		drm_dbg_kms(&dev_priv->drm,

			    "No valid intermediate pipe watermarks are possible\n");

			    "[CRTC:%d:%s] watermarks are invalid\n",

			    crtc->base.base.id, crtc->base.name);

		return ret;

	}

drivers/gpu/drm/i915/display/intel_display_core.h

+2 −4
Original line number Diff line number Diff line
@@ -81,9 +81,7 @@ struct intel_display_funcs { 
struct intel_wm_funcs {

	/* update_wm is for legacy wm management */

	void (*update_wm)(struct drm_i915_private *dev_priv);

	int (*compute_pipe_wm)(struct intel_atomic_state *state,

			       struct intel_crtc *crtc);

	int (*compute_intermediate_wm)(struct intel_atomic_state *state,

	int (*compute_watermarks)(struct intel_atomic_state *state,

				  struct intel_crtc *crtc);

	void (*initial_watermarks)(struct intel_atomic_state *state,

				   struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_wm.c

+5 −19
Original line number Diff line number Diff line
@@ -50,29 +50,15 @@ void intel_update_watermarks(struct drm_i915_private *i915) 
		i915->display.funcs.wm->update_wm(i915);

}



int intel_compute_pipe_wm(struct intel_atomic_state *state,

int intel_wm_compute(struct intel_atomic_state *state,

		     struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(state->base.dev);



	if (i915->display.funcs.wm->compute_pipe_wm)

		return i915->display.funcs.wm->compute_pipe_wm(state, crtc);



	return 0;

}



int intel_compute_intermediate_wm(struct intel_atomic_state *state,

				  struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(state->base.dev);



	if (!i915->display.funcs.wm->compute_intermediate_wm)

		return 0;

	struct intel_display *display = to_intel_display(state);



	if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm))

	if (!display->funcs.wm->compute_watermarks)

		return 0;



	return i915->display.funcs.wm->compute_intermediate_wm(state, crtc);

	return display->funcs.wm->compute_watermarks(state, crtc);

}



bool intel_initial_watermarks(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/intel_wm.h

+2 −4
Original line number Diff line number Diff line
@@ -15,9 +15,7 @@ struct intel_crtc_state; 
struct intel_plane_state;



void intel_update_watermarks(struct drm_i915_private *i915);

int intel_compute_pipe_wm(struct intel_atomic_state *state,

			  struct intel_crtc *crtc);

int intel_compute_intermediate_wm(struct intel_atomic_state *state,

int intel_wm_compute(struct intel_atomic_state *state,

		     struct intel_crtc *crtc);

bool intel_initial_watermarks(struct intel_atomic_state *state,

			      struct intel_crtc *crtc);