Commit 9d0bfa7a authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dp: convert to drm device based logging 



Prefer drm device based logging.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b1cffaa70fcc614574f2dce4461e28be7a407e30.1642769982.git.jani.nikula@intel.com
parent 0bd6c4a1

drivers/gpu/drm/i915/display/intel_dp.c

+20 −15
Original line number Diff line number Diff line
@@ -704,7 +704,7 @@ static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915, 
			i915->max_cdclk_freq * 48 /

			intel_dp_mode_to_fec_clock(mode_clock);



		DRM_DEBUG_KMS("Max big joiner bpp: %u\n", max_bpp_bigjoiner);

		drm_dbg_kms(&i915->drm, "Max big joiner bpp: %u\n", max_bpp_bigjoiner);

		bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);

	}
@@ -2918,7 +2918,8 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc, 
}



static ssize_t

intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_infoframe,

intel_dp_hdr_metadata_infoframe_sdp_pack(struct drm_i915_private *i915,

					 const struct hdmi_drm_infoframe *drm_infoframe,

					 struct dp_sdp *sdp,

					 size_t size)

{
@@ -2934,12 +2935,12 @@ intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_in 


	len = hdmi_drm_infoframe_pack_only(drm_infoframe, buf, sizeof(buf));

	if (len < 0) {

		DRM_DEBUG_KMS("buffer size is smaller than hdr metadata infoframe\n");

		drm_dbg_kms(&i915->drm, "buffer size is smaller than hdr metadata infoframe\n");

		return -ENOSPC;

	}



	if (len != infoframe_size) {

		DRM_DEBUG_KMS("wrong static hdr metadata size\n");

		drm_dbg_kms(&i915->drm, "wrong static hdr metadata size\n");

		return -ENOSPC;

	}
@@ -3012,7 +3013,8 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder, 
					    sizeof(sdp));

		break;

	case HDMI_PACKET_TYPE_GAMUT_METADATA:

		len = intel_dp_hdr_metadata_infoframe_sdp_pack(&crtc_state->infoframes.drm.drm,

		len = intel_dp_hdr_metadata_infoframe_sdp_pack(dev_priv,

							       &crtc_state->infoframes.drm.drm,

							       &sdp, sizeof(sdp));

		break;

	default:
@@ -3420,22 +3422,22 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp, 


	switch (data->phy_pattern) {

	case DP_PHY_TEST_PATTERN_NONE:

		DRM_DEBUG_KMS("Disable Phy Test Pattern\n");

		drm_dbg_kms(&dev_priv->drm, "Disable Phy Test Pattern\n");

		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), 0x0);

		break;

	case DP_PHY_TEST_PATTERN_D10_2:

		DRM_DEBUG_KMS("Set D10.2 Phy Test Pattern\n");

		drm_dbg_kms(&dev_priv->drm, "Set D10.2 Phy Test Pattern\n");

		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),

			       DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2);

		break;

	case DP_PHY_TEST_PATTERN_ERROR_COUNT:

		DRM_DEBUG_KMS("Set Error Count Phy Test Pattern\n");

		drm_dbg_kms(&dev_priv->drm, "Set Error Count Phy Test Pattern\n");

		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),

			       DDI_DP_COMP_CTL_ENABLE |

			       DDI_DP_COMP_CTL_SCRAMBLED_0);

		break;

	case DP_PHY_TEST_PATTERN_PRBS7:

		DRM_DEBUG_KMS("Set PRBS7 Phy Test Pattern\n");

		drm_dbg_kms(&dev_priv->drm, "Set PRBS7 Phy Test Pattern\n");

		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),

			       DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7);

		break;
@@ -3445,7 +3447,8 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp, 
		 * current firmware of DPR-100 could not set it, so hardcoding

		 * now for complaince test.

		 */

		DRM_DEBUG_KMS("Set 80Bit Custom Phy Test Pattern 0x3e0f83e0 0x0f83e0f8 0x0000f83e\n");

		drm_dbg_kms(&dev_priv->drm,

			    "Set 80Bit Custom Phy Test Pattern 0x3e0f83e0 0x0f83e0f8 0x0000f83e\n");

		pattern_val = 0x3e0f83e0;

		intel_de_write(dev_priv, DDI_DP_COMP_PAT(pipe, 0), pattern_val);

		pattern_val = 0x0f83e0f8;
@@ -3462,7 +3465,7 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp, 
		 * current firmware of DPR-100 could not set it, so hardcoding

		 * now for complaince test.

		 */

		DRM_DEBUG_KMS("Set HBR2 compliance Phy Test Pattern\n");

		drm_dbg_kms(&dev_priv->drm, "Set HBR2 compliance Phy Test Pattern\n");

		pattern_val = 0xFB;

		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),

			       DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_HBR2 |
@@ -3531,13 +3534,14 @@ intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp, 
static void intel_dp_process_phy_request(struct intel_dp *intel_dp,

					 const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);

	struct drm_dp_phy_test_params *data =

		&intel_dp->compliance.test_data.phytest;

	u8 link_status[DP_LINK_STATUS_SIZE];



	if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

					     link_status) < 0) {

		DRM_DEBUG_KMS("failed to get link status\n");

		drm_dbg_kms(&i915->drm, "failed to get link status\n");

		return;

	}
@@ -3562,11 +3566,12 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp, 


static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);

	struct drm_dp_phy_test_params *data =

		&intel_dp->compliance.test_data.phytest;



	if (drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) {

		DRM_DEBUG_KMS("DP Phy Test pattern AUX read failure\n");

		drm_dbg_kms(&i915->drm, "DP Phy Test pattern AUX read failure\n");

		return DP_TEST_NAK;

	}
@@ -5074,7 +5079,7 @@ static void intel_dp_modeset_retry_work_fn(struct work_struct *work) 
	intel_connector = container_of(work, typeof(*intel_connector),

				       modeset_retry_work);

	connector = &intel_connector->base;

	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,

	drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s]\n", connector->base.id,

		    connector->name);



	/* Grab the locks before changing connector property*/