Commit 9d404dad authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915/lnl: Add gmbus/ddc support 



LNL's south display uses the same table as MTP. Check for LNL's fake PCH
to make it consistent with the other checks.

The VBT table doesn't contain the VBT -> spec mapping for LNL. Like in
other cases, uses the same as the previous platform.

Bspec: 68971, 20124
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-18-lucas.demarchi@intel.com
parent f96fdcd2

drivers/gpu/drm/i915/display/intel_bios.c

+2 −1
Original line number Diff line number Diff line
@@ -2194,7 +2194,8 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 
	const u8 *ddc_pin_map;

	int i, n_entries;



	if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {

	if (INTEL_PCH_TYPE(i915) >= PCH_LNL || HAS_PCH_MTP(i915) ||

	    IS_ALDERLAKE_P(i915)) {

		ddc_pin_map = adlp_ddc_pin_map;

		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);

	} else if (IS_ALDERLAKE_S(i915)) {

drivers/gpu/drm/i915/display/intel_gmbus.c

+4 −1
Original line number Diff line number Diff line
@@ -155,7 +155,10 @@ static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915, 
	const struct gmbus_pin *pins;

	size_t size;



	if (INTEL_PCH_TYPE(i915) >= PCH_DG2) {

	if (INTEL_PCH_TYPE(i915) >= PCH_LNL) {

		pins = gmbus_pins_mtp;

		size = ARRAY_SIZE(gmbus_pins_mtp);

	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG2) {

		pins = gmbus_pins_dg2;

		size = ARRAY_SIZE(gmbus_pins_dg2);

	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {