Commit 9d943961 authored by Johan Hovold's avatar Johan Hovold Committed by Vinod Koul
Browse files

phy: qcom-qmp-combo: drop redundant DP config flag



Drop the DP_COM control block flag from the configuration data, which is
set for all combo PHYs and hence no longer needed since the QMP driver
split.

Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20220920073826.20811-18-johan+linaro@kernel.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent a73a19ea
Loading
Loading
Loading
Loading
+18 −45
Original line number Diff line number Diff line
@@ -876,9 +876,6 @@ struct qmp_phy_cfg {
	int pwrdn_delay_min;
	int pwrdn_delay_max;

	/* true, if PHY has a separate DP_COM control block */
	bool has_phy_dp_com_ctrl;

	/* Offset from PCS to PCS_USB region */
	unsigned int pcs_usb_offset;

@@ -1051,8 +1048,6 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
	.has_pwrdn_delay	= true,
	.pwrdn_delay_min	= POWER_DOWN_DELAY_US_MIN,
	.pwrdn_delay_max	= POWER_DOWN_DELAY_US_MAX,

	.has_phy_dp_com_ctrl	= true,
};

static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
@@ -1086,8 +1081,6 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
	.regs			= qmp_v3_usb3phy_regs_layout,

	.has_phy_dp_com_ctrl	= true,

	.dp_aux_init = qcom_qmp_v3_phy_dp_aux_init,
	.configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx,
	.configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy,
@@ -1126,8 +1119,6 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
	.has_pwrdn_delay	= true,
	.pwrdn_delay_min	= POWER_DOWN_DELAY_US_MIN,
	.pwrdn_delay_max	= POWER_DOWN_DELAY_US_MAX,

	.has_phy_dp_com_ctrl	= true,
};

static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
@@ -1166,8 +1157,6 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
	.has_pwrdn_delay	= true,
	.pwrdn_delay_min	= POWER_DOWN_DELAY_US_MIN,
	.pwrdn_delay_max	= POWER_DOWN_DELAY_US_MAX,

	.has_phy_dp_com_ctrl	= true,
};

static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
@@ -1201,8 +1190,6 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
	.regs			= qmp_v3_usb3phy_regs_layout,

	.has_phy_dp_com_ctrl	= true,

	.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
	.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
	.configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy,
@@ -1242,8 +1229,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
	.has_pwrdn_delay	= true,
	.pwrdn_delay_min	= POWER_DOWN_DELAY_US_MIN,
	.pwrdn_delay_max	= POWER_DOWN_DELAY_US_MAX,

	.has_phy_dp_com_ctrl	= true,
};

static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
@@ -1277,8 +1262,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
	.regs			= qmp_v4_usb3phy_regs_layout,

	.has_phy_dp_com_ctrl	= true,

	.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
	.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
	.configure_dp_phy = qcom_qmp_v5_phy_configure_dp_phy,
@@ -1320,8 +1303,6 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
	.has_pwrdn_delay	= true,
	.pwrdn_delay_min	= POWER_DOWN_DELAY_US_MIN,
	.pwrdn_delay_max	= POWER_DOWN_DELAY_US_MAX,

	.has_phy_dp_com_ctrl	= true,
};

static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
@@ -1355,8 +1336,6 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
	.regs			= qmp_v4_usb3phy_regs_layout,

	.has_phy_dp_com_ctrl	= true,

	.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
	.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
	.configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy,
@@ -1995,9 +1974,8 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
	if (ret)
		goto err_assert_reset;

	if (cfg->has_phy_dp_com_ctrl) {
		qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL,
			     SW_PWRDN);
	qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, SW_PWRDN);

	/* override hardware control for reset of qmp phy */
	qphy_setbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
			SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
@@ -2006,8 +1984,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
	/* Default type-c orientation, i.e CC1 */
	qphy_setbits(dp_com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02);

		qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL,
			     USB3_MODE | DP_MODE);
	qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL, USB3_MODE | DP_MODE);

	/* bring both QMP USB and QMP DP PHYs PCS block out of reset */
	qphy_clrbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
@@ -2016,7 +1993,6 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)

	qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
	qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
	}

	if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
		qphy_setbits(pcs,
@@ -2838,12 +2814,9 @@ static int qmp_combo_probe(struct platform_device *pdev)
	if (IS_ERR(serdes))
		return PTR_ERR(serdes);

	/* per PHY dp_com; if PHY has dp_com control block */
	if (cfg->has_phy_dp_com_ctrl) {
	qmp->dp_com = devm_platform_ioremap_resource(pdev, 1);
	if (IS_ERR(qmp->dp_com))
		return PTR_ERR(qmp->dp_com);
	}

	/* Only two serdes for combo PHY */
	dp_serdes = devm_platform_ioremap_resource(pdev, 2);