Commit 9dad21f9 authored by Yihan Zhu's avatar Yihan Zhu Committed by Alex Deucher
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drm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35 



[WHY & HOW]
Mismatch in DCN35 DML2 cause bw validation failed to acquire unexpected DPP pipe to cause
grey screen and system hang. Remove EnhancedPrefetchScheduleAccelerationFinal value override
to match HW spec.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Signed-off-by: default avatarYihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4ae86dc8

drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c

+0 −1
Original line number Diff line number Diff line
@@ -303,7 +303,6 @@ void build_unoptimized_policy_settings(enum dml_project_id project, struct dml_m 
	if (project == dml_project_dcn35 ||

		project == dml_project_dcn351) {

		policy->DCCProgrammingAssumesScanDirectionUnknownFinal = false;

		policy->EnhancedPrefetchScheduleAccelerationFinal = 0;

		policy->AllowForPStateChangeOrStutterInVBlankFinal = dml_prefetch_support_uclk_fclk_and_stutter_if_possible; /*new*/

		policy->UseOnlyMaxPrefetchModes = 1;

	}