Unverified Commit 9db32708 authored by Sen Wang's avatar Sen Wang Committed by Mark Brown
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ASoC: ti: davinci-mcasp: Add asynchronous mode support 



McASP has dedicated clock & frame sync registers for both transmit
and receive. Currently McASP driver only supports synchronous behavior and
couples both TX & RX settings.

Add logic that enables asynchronous mode via ti,async-mode property. In
async mode, playback & record can be done simultaneously with different
audio configurations (tdm slots, tdm width, audio bit depth).

Note the ability to have different tx/rx DSP formats (i2s, dsp_a, etc.),
while possible in hardware, remains to be a gap as it require changes
to the corresponding machine driver interface.

Existing IIS (sync mode) and DIT mode logic remains mostly unchanged.
Exceptions are IIS mode logic that previously assumed sync mode, which has
now been made aware of the distinction. And shared logic across all modes
also now checks for McASP tx/rx-specific driver attributes. Those
attributes have been populated according to the original extent, ensuring
no divergence in functionality.

Constraints no longer applicable for async mode are skipped.
Clock selection options have also been added to include rx/tx-only clk_ids,
exposing independent configuration via the machine driver as well.

Note that asynchronous mode is not applicable for McASP in DIT mode,
which is a transmitter-only mode to interface w/ self-clocking formats.

Signed-off-by: default avatarSen Wang <sen@ti.com>
Acked-by: default avatarPeter Ujfalusi <peter.ujfalusi@gmail.com>
Tested-by: default avatarParesh Bhagat <p-bhagat@ti.com>
Link: https://patch.msgid.link/20260203003703.2334443-5-sen@ti.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 016efcaa

include/linux/platform_data/davinci_asp.h

+2 −1
Original line number Diff line number Diff line
@@ -59,7 +59,8 @@ struct davinci_mcasp_pdata { 
	bool i2s_accurate_sck;



	/* McASP specific fields */

	int tdm_slots;

	int tdm_slots_tx;

	int tdm_slots_rx;

	u8 op_mode;

	u8 dismod;

	u8 num_serializer;

sound/soc/ti/davinci-mcasp.c

+389 −100

File changed.

Preview size limit exceeded, changes collapsed.

sound/soc/ti/davinci-mcasp.h

+10 −0
Original line number Diff line number Diff line
@@ -298,10 +298,20 @@ 
/* Source of High-frequency transmit/receive clock */

#define MCASP_CLK_HCLK_AHCLK		0 /* AHCLKX/R */

#define MCASP_CLK_HCLK_AUXCLK		1 /* Internal functional clock */

#define MCASP_CLK_HCLK_AHCLK_TXONLY	2 /* AHCLKX for TX only */

#define MCASP_CLK_HCLK_AHCLK_RXONLY	3 /* AHCLKR for RX only */

#define MCASP_CLK_HCLK_AUXCLK_TXONLY	4 /* AUXCLK for TX only */

#define MCASP_CLK_HCLK_AUXCLK_RXONLY	5 /* AUXCLK for RX only */



/* clock divider IDs */

#define MCASP_CLKDIV_AUXCLK		0 /* HCLK divider from AUXCLK */

#define MCASP_CLKDIV_BCLK		1 /* BCLK divider from HCLK */

#define MCASP_CLKDIV_BCLK_FS_RATIO	2 /* to set BCLK FS ration */

#define MCASP_CLKDIV_AUXCLK_TXONLY	3 /* AUXCLK divider for TX only */

#define MCASP_CLKDIV_AUXCLK_RXONLY	4 /* AUXCLK divider for RX only */

#define MCASP_CLKDIV_BCLK_TXONLY	5 /* BCLK divider for TX only */

#define MCASP_CLKDIV_BCLK_RXONLY	6 /* BCLK divider for RX only */

#define MCASP_CLKDIV_BCLK_FS_RATIO_TXONLY 7 /* BCLK/FS ratio for TX only */

#define MCASP_CLKDIV_BCLK_FS_RATIO_RXONLY 8 /* BCLK/FS ratio for RX only*/



#endif	/* DAVINCI_MCASP_H */