Commit 9db969b3 authored by Tejas Upadhyay's avatar Tejas Upadhyay Committed by Nirmoy Das
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drm/xe/xe2hpg: Add Wa_15016589081 



Wa_15016589081 applies to xe2_hpg renderCS

V2(Gustavo)
  - rename bit macro

Signed-off-by: default avatarTejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: default avatarHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240904101333.2049655-1-tejas.upadhyay@intel.com


Signed-off-by: default avatarNirmoy Das <nirmoy.das@intel.com>
parent 5a90b60d

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ 


#define CHICKEN_RASTER_1			XE_REG_MCR(0x6204, XE_REG_OPTION_MASKED)

#define   DIS_SF_ROUND_NEAREST_EVEN		REG_BIT(8)

#define   DIS_CLIP_NEGATIVE_BOUNDING_BOX	REG_BIT(6)



#define CHICKEN_RASTER_2			XE_REG_MCR(0x6208, XE_REG_OPTION_MASKED)

#define   TBIMR_FAST_CLIP			REG_BIT(5)

drivers/gpu/drm/xe/xe_wa.c

+4 −0
Original line number Diff line number Diff line
@@ -733,6 +733,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = { 
			     DIS_PARTIAL_AUTOSTRIP |

			     DIS_AUTOSTRIP))

	},

	{ XE_RTP_NAME("15016589081"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))

	},



	{}

};